2 k Page k9k8g08 writepage readpage

2011-01-21 11:05:19| Category: Default Category | Font size subscription

Static U32 writepage (U32 addr, U8 *buf)
{
U32 I, MECC, SECC;
U8 Stat, tmp[6], value;

Addr &= ~0x3f;

INITECC (); Reset ECC
Meccunlock (); Unlock Main area ECC
Nfchipen (); Open the Nandflash film selection
Waitnfbusy (); Waiting for a busy signal
Wrnfcmd (0x80); Page Write command Cycle 1

WRNFADDR (0x00); Column Address A0~a7
WRNFADDR (0x00); Column Address A8~a11
Wrnfaddr ((addr>>0) & 0xFF); Line Address A12~a19
Wrnfaddr ((addr>>8) & 0xFF); Line Address A20~a27
Wrnfaddr ((addr>>16) & 0xFF); Line Address A28~a30

for (i=0; i<2048; i++)
Wrnfdat (Buf[i]); Write a page of data

Waitnfbusy (); Waiting for a busy signal
Mecclock (); ECC check code for lock main area
MECC = RDNFMECC (); Read ECC check code in main area

Converts the ECC check code in the main area from the font to the byte type and saves it in the 0 o'clock array.
Tmp[0] = (U8) (MECC&AMP;0XFF);
TMP[1] = (U8) ((mecc>>8) &0xff);
TMP[2] = (U8) ((mecc>>16) &0xff);
TMP[3] = (U8) ((mecc>>24) &0xff);

Seccunlock (); Unlock ECC in the spare area

Writes the ECC value of the main area to the first four bytes of the spare zone, which is the No. 2048 to No. 2051 address
Wrnfdat (Tmp[0]);
Wrnfdat (tmp[1]);
Wrnfdat (tmp[2]);
Wrnfdat (Tmp[3]);

Secclock (); ECC check code for locked spare zone
SECC = RDNFSECC (); Read ECC check code in spare area

The ECC check code in the spare area is converted from the font to byte type and saved in the 0 o'clock array.
TMP[4] = (U8) (SECC&AMP;0XFF);
TMP[5] = (U8) ((secc>>8) &0xff);

Write the ECC value of the spare area to the No. 2052 to No. 2053 address of the spare zone.
Wrnfdat (Tmp[4]);
Wrnfdat (Tmp[5]);

Wrnfcmd (0x10); Page Write command Cycle 2
Waitnfbusy (); Waiting for a busy signal
Wrnfcmd (0x70); Read-Write Status command
Waitnfbusy (); Waiting for a busy signal
Stat = Rdnfdat (); Read status Word
Nfchipds (); Close Nandflash Chip selection
if (STAT&AMP;0X01)
{
Markbadblk (addr); Labeling Bad Blocks
Puts ("Writepage error!\n"); Write operation failed
return 0; Write operation failed
}
Puts ("Writepage No error!\n"); Write Operation succeeded
return 1; Write Operation succeeded
}

static void Readpage (U32 addr, U8 *buf)
{
U32 I, MECC, SECC;

Addr &= ~0x3f;

INITECC (); Reset ECC
Meccunlock (); Unlock Main area ECC
Nfchipen (); Open the Nandflash film selection
Waitnfbusy (); Waiting for a busy signal
Wrnfcmd (0x00); Page Read Command Cycle 1

WRNFADDR (0x00); Column Address A0~a7
WRNFADDR (0x00); Column Address A8~a11
Wrnfaddr ((addr>>0) & 0xFF); Line Address A12~a19
Wrnfaddr ((addr>>8) & 0xFF); Line Address A20~a27
Wrnfaddr ((addr>>16) & 0xFF); Line Address A28~a30

Wrnfcmd (0x30); Page Read Command Cycle 2
Waitnfbusy (); Waiting for a busy signal

for (i=0; i<2048; i++)
Buf[i] = Rdnfdat (); Read a page of data
Waitnfbusy (); Waiting for a busy signal

Mecclock (); Lock the ECC value in the main area

Seccunlock (); Unlock ECC values in the spare area

MECC = RdNFDat32 (); Read the first 4 address contents of the spare area, that is, 2048~2051, which is the ECC value of the main area, four bytes
Buf[i+1] = (U8) (MECC & 0xff); Put the ECC check in the Read main area into the 0 o'clock array.
BUF[I+2] = (U8) ((mecc>>8) & 0xff); Put the ECC check in the Read main area into the 0 o'clock array.
BUF[I+3] = (U8) ((mecc>>16) & 0xff); Put the ECC check in the Read main area into the 0 o'clock array.
BUF[I+4] = (U8) ((mecc>>24) & 0xff); Put the ECC check in the Read main area into the 0 o'clock array.

The ECC check of the read main area is placed in the corresponding location of the NFMECCD0/1
RNFMECCD0 = ((mecc&0xff00) <<8) | (MECC&AMP;0XFF);
RNFMECCD1 = ((mecc&0xff000000) >>8) | ((mecc&0xff0000) >>16);

Secclock (); Locking the ECC value of the spare zone

SECC = RdNFDat32 (); Reads the 4 address contents of the spare area, which is 2052~2055, where the first two bytes are the ECC values of the spare zone

BUF[I+5] = (U8) (SECC & 0xff); The ECC check in the spare area is read into the 0 O'Clock array.
BUF[I+6] = (U8) ((secc>>8) & 0xff); The ECC check in the spare area is read into the 0 O'Clock array.
BUF[I+7] = (U8) ((secc>>16) & 0xff); The ECC check in the spare area is read into the 0 O'Clock array.
BUF[I+8] = (U8) ((secc>>24) & 0xff); The ECC check in the spare area is read into the 0 O'Clock array.
RNFSECCD = ((secc&0xff00) <<8) | (SECC&AMP;0XFF); The ECC check of the spare area read into the corresponding position in the NFSECCD

Nfchipds (); Close Nandflash Chip selection

if (((rNFESTAT0) &0x0f) ==0)//Determine if there is bit error in main data area and spear date area
Puts ("ECC No error!\n"); have ECC errors
Else
Puts ("ECC error!\n"); No ECC errors
Puts ("0x%8x\n", (rNFESTAT0)); Displays the Read rNFESTAT0 register