6. Trigger Implements RAM

Source: Internet
Author: User

When we're done with triggers, we should apply some of these things, like random memory ram. In the ordinary life, we like to take notes, so that we can completely store the data, until you want to see the time to come up to see, this is called First storage after access. Memory is the same, pre-stored data, wait until the time to read the data.

Memory is divided into sequential and random. We're talking about random memory here.

We have already talked about the D flip-flop, when the hold bit is 1 o'clock, the data input and output are equal, when the hold bit is 0 o'clock, the data input does not affect the output is latched. This is only a 1-bit latch, or a 8-bit latch if 8 cascade. That is, 8-bit input, 8-bit output. But if we only have one light bulb, how does it represent the 8-bit output? We can selectively display a bit of data input. Here we need 8-1 data selector, 8-bit input, one output, 3 switch selection, to indicate that the special positioning of the data is output. Talk about the output, and then talk about the input, we also need to choose which input can be passed in, we need to choose a decoder that is the opposite of the selector function 3-8 decoder, there is a data input to 8 data input, through the switch can be effectively selected which latch input port to the latch output, So we have finished specifying an input input and specifying the input output of this input and displaying it in the bulb. The latch implements the write, and the subsequent selector implements the read, and the switch can freely read any latch output, so we realize the function of RAM. But here we only implement the 8*1ram, the storage unit is 1 B, there are 8 storage units. With proper cascade, we can implement 8*2ram or 16*1ram.

As a practical example, we choose 64k*8ram, a storage unit to store a byte, we have a 64K storage unit, namely 2^16, which corresponds to our address range of 0-2^16, we use 16 switches to select a specific address, control the specific address of the corresponding storage unit, So we can get the output.

As we have said before the trigger is composed of logic gates, the logic gate is composed of relays, the structure of the relay we already know, there is a metal reed control circuit, when we designed the RAM is being used and when the power is suddenly interrupted, then the circuit does not pass, then the metal reed back to the position, so the result is lost all the data.

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