Arm debugging Summary

Summary of ads-based arm debugging problems
1.
You may have discovered that codewarrior ide has created three
Target, which is "debugrel", "realse", and "debug ".
Debugging method.
Debugrel indicates that debugging information is generated for each source file when the target is generated; debug indicates that the most complete debugging information is generated for each source file; Release
Indicates that no debugging information is generated. Generally, "debugrel" is selected by default ". See Figure 6 at the same time
You can find that each time you add a file, you will be asked which target to add. Generally, all three are added by default. Click OK.

2.
I encountered this error when compiling the program. What is the problem?
Error: (fatal)
L6002u: cocould not open file D: // tmmgrsp/weekly Force/ARM Embedded System tutorial/flashdown. MCP
Re:
Do not use the Chinese name path;
Click Remove object code... under the project, and then re-compile it.

3.
I just bought a 2131 development board. No matter how it is erased, it cannot be simulated under axd.
Error: error, Flash is protected by user configation!
Re:
1: Use easyjtag v1.06;
2: Select "erase when necessary" in JTAG configuration ".

4.
Error 0x40001e00 is prompted in axd! Flash sector 0 write failed!
Re:
1. Use easyjtag to write External Flash. Note that the 16-bit bus mode is required and the sst39vf106 chip is required.
2. If it is a self-built board, you must first debug it in the internal RAM to ensure that easyjtag is connected to the board.
3. If there is external Ram, you must first pass (TEST) the external Ram to test the bus.

5.
The error "RDI warning 00254: unimplemented RDI message" is displayed in axd.
Re:
It is a JTAG problem. You can try ISP first. If ISP is available, it indicates that the LPC2104 is not damaged and the program can run normally.
The nrst, TDI, TMS, rtck, and other JTAG pins must be connected with a drop-down resistor to ensure a stable initial state when the JTAG is powered on. For details, see the JTAG reference circuit provided by arm.
For some PC machines, easyjtag cannot correctly connect to the Development Board. An error dialog box is always displayed. You can check whether the connection is reliable, whether software dogs are connected to the port, or power up and down the Development Board. In addition, set the parallel port mode to spp mode in the CMOS settings of the PC, and set the parallel port resource to listen H ~ 37fh.

6.
Error message: no disassembly cocould be read at the requested address.
Re:
1. It may be encrypted. Use the ISP software (flashmagic) to see if flash can be erased.
2. The chip may also be burned out.

7.
Error message: RDI severe error 00602: Can't halt target and make it enter debug state.
Re:
When you operate iondir in non-gpio mode, JTAG debugging cannot be paused, and the axd will pop up the following window and be forced to close: "RDI severe
Error 00602: Can't halt target and make it enter debug
"RDI serious error 00602:
You cannot pause the target and bring it into the debugging status ." When this happens, reset 2131 (or power on again) and re-open the H-JTAG software and axd.

8.
What is the difference between sdt jtag and wigggler JTAG?
Re:
The difference between sdt jtag and wigggler JTAG is only in the same method as that of the parallel port. Functions are the same. In openocd, you should be able to find the definition of the connection between the JTAG signal and the parallel port, and make corresponding modifications.

9.
Error message: RDI severe error 00616: failed to access instruction register.
Re:
1. It may be that the parallel port drive capability is not strong enough, which affects the JTAG signal quality and causes instability.
2. It may be that there is a problem with your Flash program. First, burn a program that can run normally in flash and try again.

10.
About the JTAG interface:
P1.20/tracesync should be added with a pull resistor to disable the trace function. Pinsel2 must be initialized at the beginning of the program.
Lpc2210 JTAG
Note
1, 2/vdd3.3v
P1.31/ntrst, input 3/ntrst, and output easyjtag have a pull-up resistance.
P1.28/TDI, input 5/TDI, and output easyjtag have a pull-up resistance.
P1.30/TMS, input 7/TMS, and output easyjtag have a pull-up resistance.
P1.29/TCK, input/output 9/TCK, and input/output easyjtag have the pull-up resistance.
P1.26/rtck, input 11/rtck, output p1.26 external drop-down resistor.
P1.26 has internal pull-up resistance, so the pin will be high during measurement. However, during the reset, the pull-up resistance does not work, only the external drop-down resistance works, p1.26 = 0 V, so after power-on, the D3 ~ of pinsel2 ~ D0 is 0x04 (b0100), and JTAG is valid.
If p1.26 is attached to 3.3v and then reset, the D3 ~ of pinsel2 ~ D0 will be 0x00, and JTAG is invalid.
P1.27/TDO, output 13/TDO, and input easyjtag have a pull-up resistance.
Nreset, input 15/nrst, and output easyjtag have a pull-up resistance.
, 20/Gnd
17,19/NC

11.
Error message: DBE warning 00041: an unspecified debug toolbox call faied.
Re:
1. First, use the ISP software to completely erase the lpc2000 series chips on the board. If the chip is encrypted, JTAG debugging cannot be performed.
2. Check whether the connection between the parallel line and the JTAG simulation header is reliable.
3. Check the parallel port Mode settings. Do not connect other hardware (such as software dogs) to the parallel port ).

12.
Error message: RDI warning 00148: Can't set point.
Re:
The reason is that the number of broken points set by the simulator in the Rom is limited, and the breakpoint must be used internally during a single-step operation.
Solution: 1. Clear all breakpoints.
2. Use "option-> config processor" to open the "processor Properties-ARM7TDMI" window, click clear all.

13.
Error message: DBE warning 00056: The statement into which was stepped is singular (I. e. It has no exit ).
Re:
It indicates that the CPU is in an endless loop and check your RAM and bus configurations.

14.
Data Retrieval aborted
Re:
The root cause of data access suspension and data access suspension is to access illegal addresses (you cannot access the address space not allocated to you, you cannot access the reserved address space ). One of the common reasons for triggering a Data fetch abort and a data fetch abort is that the cache operation by pointer is out of bounds.
If a weekly template is used, modify the parameters in the configuration file. The Weekly template is the minimum chip model by default. It mainly modifies the ram start address and top-end RAM address.
Please check the data manual!
Mem_a.scf _ relinflash
Mem_ B .scf _ debuginram
Mem_c.scf _ debuginflash

15.
The following error occurs: warring: l6329w:./src/mem_ B .scf pattern * (RW) only matches removed unused sections.
Re
The reason for connection warning is that the global variable you defined is initialized at the same time, but this global variable is not used in your program!
It is not a segment without the RW attribute. Generally, the program has a heap and global variables are in heap. A clear attribute of heap is readable and writable.

16.
Error: c2933e: Type disagreement for 'rcvmcu 'appears '.
Re
Cut the implementation of function a before the implementation of function B.

17.
 
The SPI time sequence is mainly determined by the external slave machine. You can select the current mode based on the input sequence diagram required by the slave machine, and then compare the output sequence diagram in the four modes in the book. If the slave is a rising edge
Input and Output along the descent edge. Select cpha = 1 and cpol = 1. If the slave is output along the rising edge, select cpha = 0 and cpol = 1.
Of course, the timing of the SPI host depends on whether the slave machine has data output when selecting slices. In the preceding two examples, we assume that no data is output during the slice selection.
1. SPI is a full-duplex communication method, that is, one frame of data is received when data is sent;
2. As for the function of returned data: when the data needs to be sent from the host to the host, the returned data is the data to be sent from the slave;
3. When the SPI reads data from the slave machine, the host sends data because the clock is provided by the host during SPI communication, and the host data provides the clock signal to the slave machine.
 
SPI communication was originally triggered by the host to generate a clock. Therefore, 1138 is used to generate a clock when reading data. To generate a clock, data is sent. Generally, 1138 is sent when reading data.
0xff, the processor will automatically store the online RX data to the FIFO, and the memory knows that it is reading the data and does not care about the data sent by 1138.
However, although the memory did not send data to RX when sending the command in the previous 1138, The 1138 still considers the above as valid data and regards the high level on RX as 0xff for receiving
FIFO, so it is best to clear the FIFO before receiving data.

18.
Error: (fatal) l6002u: cocould not open file E:/test for ARM/recorder_arm/recorder_arm_data/debuinram/objectcode/startup. O.
Re:
Click Remove object code... under the project, and then re-compile it.