The implementation of the code is in file System/core/include/cutils
Http://androidxref.com/4.4.3_r1.1/xref/system/core/include/cutils/atomic.h
16
17#ifndef Android_cutils_atomic_h
18#define Android_cutils_atomic_h
19
20#include <stdint.h>
21#include <sys/types.h>
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/*
* A Handful of basic atomic operations. The appropriate pthread
* functions should be used instead of these whenever possible.
30 *
* the "acquire" and "release" terms can be defined intuitively in terms
* of the placement of memory barriers in a simple lock implementation:
*-Wait until Compare-and-swap (Lock-is-free to Lock-is-held) succeeds
*-Barrier
*-[DO work]
*-Barrier
PNS *-Store (Lock-is-free)
Very crude terms, the initial (acquire) barrier prevents any of the
Happening before the lock is held, and the later (release)
Barrier ensures that all of the work happens before the lock is released.
* (Think of cached writes, cache read-ahead, and instruction reordering
Around the CAS and store instructions.)
43 *
* The barriers must apply to both the compiler and the CPU. Note it is
* Legal For instructions this occur before an ' acquire ' barrier to be
* Moved down below it, and for instructions the occur after a "release"
* Barrier to is moved up above it.
48 *
* The Arm-driven implementation we use here are short on subtlety,
Actually requests a full barrier from the compiler and the CPU.
Wuyi * The only difference between acquire and release are in whether they
* is issued before or after the atomic operation with which they
* is associated. To ease the transition-C + + atomic intrinsics,
should * you are not rely in this, and instead assume is only the minimal
* Acquire/release protection is provided.
56 *
* Note:all int32_t* values is expected to being aligned on 32-bit boundaries.
* If They is not, atomicity was not guaranteed.
59 */
60
61/*
* Basic arithmetic and bitwise operations. These all provide a
Barrier with "release" ordering, and return the previous value.
64 *
* These has the same characteristics (e.g. what happens on overflow)
* As the equivalent non-atomic C operations.
67 */
68int32_t android_atomic_inc (volatile int32_t* addr);
69int32_t Android_atomic_dec (volatile int32_t* addr);
70int32_t Android_atomic_add (int32_t value, volatile int32_t* addr);
71int32_t Android_atomic_and (int32_t value, volatile int32_t* addr);
72int32_t android_atomic_or (int32_t value, volatile int32_t* addr);
73
74/*
Perform a atomic load with "acquire" or "release" ordering.
76 *
The necessary if you need the memory barrier. A 32-bit Read
* From a 32-bit aligned address was atomic on all supported platforms.
79 */
80int32_t android_atomic_acquire_load (volatile const int32_t* addr);
81int32_t android_atomic_release_load (volatile const int32_t* addr);
82
83/*
* Perform an atomic store with "acquire" or "release" ordering.
85 *
The necessary if you need the memory barrier. A 32-bit Write
* To a 32-bit aligned address was atomic on all supported platforms.
88 */
89void Android_atomic_acquire_store (int32_t value, volatile int32_t* addr);
90void Android_atomic_release_store (int32_t value, volatile int32_t* addr);
91
92/*
* Compare-and-set operation with "acquire" or "release" ordering.
94 *
* This returns zero if the new value is successfully stored, which would
happen when *addr = = OldValue.
97 *
98 * (The return value is inverted from implementations on other platforms,
* But matches the ARM Ldrex/strex result.)
100 *
101 * Implementations the use of the release CAS in a loop may is less efficient
102 * than possible, because we re-issue the memory barrier on each iteration.
103 */
104int Android_atomic_acquire_cas (int32_t oldvalue, int32_t newvalue,
int32_t* volatile addr);
106int Android_atomic_release_cas (int32_t oldvalue, int32_t newvalue,
107 volatile int32_t* addr);
This is a processor-related function that performs an atomic plus 1 operation that may be more efficient. It is used this way, if oldvalue equals * addr is assigned to * addr, returns 0, otherwise returns 1
108
109/*
* Aliases for code using a older version of this header. These is now
111 * Deprecated and should not be used. The definitions'll be removed
* * In a future release.
113 */
114#define Android_atomic_write Android_atomic_release_store
115#define Android_atomic_cmpxchg Android_atomic_release_cas
116
117#ifdef __cplusplus
118}//extern "C"
119#endif
120
121#ENDIF//Android_cutils_atomic_h
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