Beginner Delphi Embedded Assembly [30]

Register table

Type	Name	Binary code	Register description
Multifunction Registers	AL	0	Cumulative registers low eight bits
AH	100	Cumulative registers low eight bits
Ax	0	16-bit Cumulative register
EAX	0	32-bit Cumulative register
BL	11	Base Address register low eight bits
Bh	111	Base Address register low eight bits
Bx	11	16-bit Base address register
EBX	11	32-bit Base address register
Cl	1	Count registers low eight bits
Ch	101	Count registers low eight bits
CX	1	16-bit count registers
Ecx	1	32-bit count registers
Dl	10	Data registers low eight bits
Dh	110	Data registers low eight bits
Dx	10	16-bit data registers
EDX	10	32-bit data registers
Pointer registers	Sp	100	16-bit stack pointer register
Esp	100	32-bit stack pointer register
Bp	101	16-bit base address pointer register
Ebp	101	32-bit base address pointer register
Variable Address Registers	DI	111	16-bit target variable address registers
Edi	111	32-bit target variable address registers
SI	110	16-bit source change register
Bs.	110	32-bit source change register
Dedicated registers	Ip	*	16-bit instruction pointer register
Eip	*	32-bit instruction pointer register
FLAGS	*	16-bit Flag register
EFlags	*	32-bit Flag register
Segment Registers	Cs	1	Code Snippet Registers
Ds	11	Data segment Registers
Es	0	Additional segment Registers
Ss	10	Stack segment Registers
Fs	100	Sign Segment Registers
Gs	101	Global segment Registers
Control registers	CR0	0	Control Register Zero
Cr1*	1	Control registers A
CR2	10	Control Register Two
CR3	11	Control Registers Three
CR4	100	Control Register Four
cr5*	101	Control registers Five
cr6*	110	Control Register Six
cr7*	111	Control Register VII
Debug Registers	DR0	0	Debug Register Zero
DR1	1	Debug Registers A
DR2	10	Debug Register Two
Crt	11	Debug Registers Three
dr4*	100	Debug Registers Four
dr5*	101	Debug Registers Five
DR6	110	Debug Register Six
DR7	111	Debug Registers Seven
Task Registers	TR0	0	Task Register Zero
TR1	1	Task Register One
TR2	10	Task Register Two
Srt	11	Task Register Three
TR4	100	Task Register Four
TR5	101	Task Register Five
TR6	110	Task Register Six
TR7	111	Task Register Seven
Floating-point registers	ST0	0	Floating-point Register Zero
ST1	1	Floating-point registers One
ST2	10	Floating-point register two
ST3	11	Floating point Register Three
ST4	100	Floating point Register Four
ST5	101	Floating-point registers five
ST6	110	Floating-point registers six
ST7	111	Floating Point Register Seven
Multimedia registers	MM0	0	Media Register Zero
MM1	1	Media Registers A
MM2	10	Media Register Two
MM3	11	Media Registers Three
MM4	100	Media Registers Four
MM5	101	Media Registers Five
MM6	110	Media Register VI
MM7	111	Media Register Seven
Single instruction flow, multiple data stream registers	XMM0	0	Single instruction flow, multiple data stream register zero
XMM1	1	Single instruction flow, multiple data stream registers one
XMM2	10	Single instruction flow, multiple data stream register two
XMM3	11	Single instruction flow, multiple data stream registers three
XMM4	100	Single instruction flow, multiple data stream registers four
XMM5	101	Single instruction flow, multiple data flow registers five
XMM6	110	Single instruction flow, multiple data stream registers six
XMM7	111	Single instruction flow, multiple data stream registers seven
Note: The English name has the asterisk "*" the expression as the reserved domain, actually does not use, the binary code has the asterisk "*" to indicate eliminates the binary number representation

According to the www.olanguage.org data.