cmsis system [Edit ...]

What Cmsis is, although the name is similar to CMMI, but it doesn't really matter.

To borrow the definition of Baidu Encyclopedia: ARM cortex™ Microcontroller Software Interface standards (CMSIS:CORTEX microcontroller software Interface standard) is cortex-m Vendor-independent hardware abstraction layer for the processor family.

In short, cmsis is a software interface standard defined by arm and many companies that produce CORTEX-M processors to enable the software reuse of different cortex-m processors and reduce the cost of migration. CORTEX-M processor is used to replace the ARM7 series, but Cmsis standard is with the popularity of cortex-m, arm company realized the ARM7 era of product compatibility, portability of the problem. At the same time, from the development of SCM, the traditional "register-based" development of the efficiency and the difficulty of the development of personnel training more and more difficult to adapt to the increasingly complex application development.

Embedded software practitioners either from the microcontroller development, or from the PC-side application development. The former has some knowledge of circuit and processor chip, but lacks the method of modern software development and engineering theory. The latter generally have advanced development language experiences (C#,java, etc.), understand more advanced methods such as object-oriented development, but they lack the knowledge of circuits and chips, even the register is difficult to understand.

The advent of cmsis has undoubtedly brought the gospel to the development of CM-based chips, and its layered structure makes the software have a good architecture, reducing the difficulty of system migration. The encapsulation of register operations (provided by each vendor) reduces the difficulty of software developers.

Using Baidu Encyclopedia to explain the level and components of cmsis software

(http://baike.baidu.com/link?url= pcmfjddcnjcwzcsp9hswbqsrbsx1ah0fgpdhuxj9dur8tuikjfuweffyl2hkzbh3wylswx5oimdxtb1-z5-j2k#refindex_1_5152578)

cmsis Software Hierarchy Cmsis can be divided into several software layers, which are provided by ARM company and chip supplier respectively. ARM provides the following sections, which can be used in a variety of compilers: the kernel device access layer: The name definition, address definition, and helper functions that contain the register device used to access the kernel. It also defines an interface independent of the microcontroller for the RTOs (real-time operating system), which includes the debug channel definition. Intermediate Device Access Layer: Provides a common way for software to access peripherals. The chip vendor should modify the intermediate device access layer to accommodate peripherals on the microcontroller used by the intermediate device components. Currently the intermediate device Access layer is still in the development process, this article does not do in detail. The chip vendor extends the following software tiers: Microcontroller Peripheral Access layer: Provides definitions for all peripherals on the chip. Access functions for peripherals (optional): Provides additional helper functions for peripherals. The cmsis defines a common method for accessing peripheral registers and a common method for defining exception vectors for CORTEX-MX microcontroller systems. The name of the kernel device's register name and the kernel exception vector. An RTOs interface that is independent of the microcontroller with a debug channel. Intermediate Device Component Interface (TCP/IP protocol stack, flash file system). cmsis contains components 1, perimeter registers, and interrupt definitions: Consistent interface for device registers and interrupts 2, kernel peripheral functions: Access functions for specific processor functions and core peripherals 3, DSP libraries: optimized signal processing algorithms and provides CORTEX-M4 for SIMD instructions Support 4, System View Description (SVD): An XML file that describes device peripherals and interrupts. The standard is fully scalable to ensure it is suitable for all CORTEX-M processor family microcontrollers, from a minimum of 8 KB devices to devices with complex communication peripherals such as Ethernet or USB. (The memory requirements for kernel peripheral functions are less than 1 KB code, less than 10 bytes of RAM).

In addition, Keil from the v5.0 version of the built-in cmsis support, I believe that with the release of the new release, based on the development of cmsis system will be favored by manufacturers and developers.