DDS sine Generator

Although the test is approaching, we still have to steal time to complete the primary operations of DDS, O (cost _ attention) O Hahaha. It takes a little effort to figure out the theoretical principles, download and debug the waveforms.

This is also counted from the first battle of VHDL in the battle, so it's a little less fun to design modules ......

No matter whether this is a project or not, I still got it out in a short time. As for details, the problem still has enhanced functions. I will talk about it after the exam!

First, we need to clarify the theoretical computing relationships in DDS. A good design always relies on some theories. Take the output signal as an example. The main relationship and formula are as follows.

We all know that the phase of the output sine signal is: trigonometric function!

To digitize t data, select the reference clock (system clock) and reference phase (divide 2 into 2n equal portions) so that each phase has a quantization value, the benchmark phase is the accuracy of Phase Quantization.

The phase increment of the output signal within a period of the benchmark clock is:

In this wayPhase IncrementQuantization: because it is an integer,Will produce quantitative Error.

Therefore, the output frequency can be transformed to obtain the following output frequencies: we can see that, in a linear relationship, the benchmark clock is divided to get the output clock, and there are:

The frequency resolution of DDS is: at this time, = 1, and the output clock frequency is the smallest.

The basic workflow of DDS is to get the current phase value through the accumulation of phases, and then use the current phase value (converted to the ROM address) to look up the table, get the corresponding amplitude, and then output it.

The input of the phase accumulators, also known as the frequency word, is the quantization value of the phase increment.

In fact, the useful formula is to find the frequency word:

DDS is mainly composed of a phase accumulators, a phase modulated device, a rom lookup table, and a DAC. Among them, the phase modulation is used for the phase modulation of the signal, which can be used when the waveform generator is designed.

Because there is no oscilloscope, the DAC part is not designed either. Use SignalTap II to observe. (Oscilloscope? YY !)

The basic principle of DDS is as follows;

The data volume in the Rom is determined by the number of DAC digits. If the precision is 10 digits, the ROM needs to store the data of 1024 points in a cycle, the data size of each vertex is determined by the amplitude value of the vertex.

The read clock frequency of the RoM is. Of course, the ROM data should be obtained by C or Matlab. If you input it manually, the system will vomit blood.

 

In this experiment, the reference clock is 50 MHz and the output clock is 1 kHz. The waveform obtained by signaltapii is as follows. The waveform is still correct:

ProgramSome of them did not encounter any problems, but they were mounted on the MIF file at the beginning. Fortunately, they encountered a high person in the group and re-obtained it with MATLAB, and finally got the correct result!

The departure tragedy explains how DDS works: