Compare with Intel assembly language

Compare with Intel assembly language

recently in the study of assembly language, the results appear very strange is, under the vc++6.0 code, the GCC compiler code is not the same, later found that Linux inherits the Unix family assembly instructions, usually common is the Intel assembly language. Let's explore the relationship between the two in the next.

1. Prefix

in the In Intel's syntax, the register and the immediate number are not prefixed. At/T, however, the Register is preceded by "%" and immediately preceded by "$". In Intel's syntax, hexadecimal and binary immediate suffix are labeled "H" and "B" respectively, while at/T, hexadecimal immediately preceded by "0x", table 2.2 gives several corresponding examples.

Table 2.2 The difference between Intel and the-t prefix

intel syntax	at&t syntax
mov eax 8	movl $8,%eax
mov ebx, 0fffh	MOVL $0xffff,%ebx
Int 80h	Int $0x80

2. Direction of the operand

Intel is in the opposite direction of the/t operand. In Intel syntax, the first operand is the destination operand, and the second operand is the source operand. At/T, the first number is the source operand, and the second number is the destination operand. It can be seen that the grammar of at-and-T is consistent with people's usual reading habits.

For example: in Intel, MOV eax,[ecx]

in the At/T, MOVL (%ECX),%eax

3. Number of memory unit operands

as you can see from the example above, the number of memory operands is also different. in Intel's syntax, the base register is enclosed in "[]", and at/T, in "()".

For example: in the Intel, MOV eax,[ebx+5]

in the AT&T,MOVL 5 (%EBX),%eax

4. Indirect addressing method

with the Intel's syntax comparison, and the indirect addressing method may be more obscure and difficult to understand. Intel's instruction format is segreg:[base+index*scale+disp], and the-T format is%segreg:disp (Base,index,scale). All of the Index/scale/disp/segreg are optional and can be simplified completely. If index is specified without a scale specified, the default value for scale is 1. Segreg segment registers are dependent on instructions and whether the application is running in real or protected mode, in real mode it relies on instructions, while in protected mode, Segreg is redundant. At/T, when the immediate number is used in scale/disp, it should not be prefixed with a "$" prefix, table 2.3 gives its syntax and several corresponding examples.

Table 2.3 Syntax and examples of memory operands

Intel syntax	AT/t syntax
directive Foo,segreg:[base+index*scale+disp] instruction%segreg:disp (Base,index,scale), foo
mov eax,[ebx+20h] movl 0x20 (%EBX),%eax
add eax,[ebx+ecx*2h addl (%ebx,%ecx,0x2),%eax
lea Eax,[ebx+ecx] leal (%EBX,%ECX),%eax
Sub eax,[ebx+ecx*4h-20h]	subl-0x20 (%ebx,%ecx,0x4),%eax

as can be seen from the table, The grammar is obscure, because [Base+index*scale+disp] can see its meaning at a glance, and disp (Base,index,scale) is unlikely to do so.

This approach is often used to access a field within a particular element of the data structure array, wherebase is the starting address of the array, and scale is the size of each element of the arrays, and index is the subscript. If the array element is also a structure, the disp is the displacement of the concrete field in the structure.

5. Suffix of operation code

In the above example you may have noticed that in the The opcode is followed by a suffix, meaning that the size of the opcode is indicated. "L" denotes a long integer (32 bits), "w" denotes a word (16 bits), and "B" represents a byte (8 bits). In Intel's syntax, you add a byte ptr, Word ptr, and DWORD ptr to the front of the memory unit operand, and DWORD corresponds to "long". Table 2.4 shows a couple of corresponding examples.

Table 2.4 Example of the suffix of the opcode

intel syntax Span style= "font-family: ' The song body '; font-size:16px;" >	Intel syntax AT/t syntax
mov al,bl	movb%bl,%al  
mov ax,bx	MOVW%bx,%ax
mov eax, DWORD ptr [EBX]	movl (%EBX),%eax

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Compare with Intel assembly language