Modelsim Simulation of RapidIO II IP Core demonstration testbench may Require Ld_debug Command

solution ID: fb83262
Last Modified: May 17, 2013
Product Category: Intellectual Property
ProductArea: Comm, Interface & Peripherals
Product sub-area: IP Spec and Protocol
Version Foundin: v12.1
Version Fixedin: v13.0

Title

Modelsim Simulation of RapidIO II IP Core demonstration testbench may Require Ld_debug Command

Description

The RapidIO II megacore Function User Guide Lists the instructions-simulate the demonstration testbench included with T The He IP core using the Modelsim simulator. However, in variations so include an I/O Logical layer Master module or an I/O Logical layer Slave module, Modelsim simu Lation fails using these instructions.

The error occurs during loading, and displays as "Fatal:error occurred in protected context."

Workaround/fix

To avoid the issue, for variations, the Include an I/O Logical layer Master module or an I/O Logical layer Slave module, Replace ld the command with the command in ld_debug the command sequence listed in the ' simulating with the Modelsim Simul Ator "section on the Getting Started chapter of the RapidIO II megacore Function User Guide.

This issue is a fixed in version 13.0 of the RapidIO II megacore function.

Modelsim Simulation of RapidIO II IP Core demonstration testbench may Require ld_debug Command