1. wildcard: Extended wildcard
2. notdir: remove the path
3. patsubst: Replace the wildcard character
Example:
Create a test directory and create a subdirectory named sub under the test directory.
$ Mkdir Test
$ CD Test
$ Mkdir sub
Create a. C and B. C2 files under test, and create SA. C and SB. C2 files under sub directory.
Create a simple makefile
Src = $ (wildcard *. C./SUB/*. c)
Dir = $ (notdir $ (SRC ))
OBJ = $ (patsubst %. C, %. O, $ (DIR ))
ALL:
@ Echo $ (SRC)
@ Echo $ (DIR)
@ Echo $ (OBJ)
@ Echo "end"
Result Analysis:
First line output:
A. c B. C./SUB/SA. C./SUB/SB. c
Wildcard expands all files with the suffix C under the specified directory./And./SUB.
Output in the second row:
A. c B. C SA. c sb. c
Notdir removes the path information from the expanded File
Output in the third row:
A. o B. O SA. O Sb. o
In $ (patsubst %. C, %. O, $ (DIR), patsubst replaces all variables in $ (DIR) with. O whose suffix is. C,
Any output.
Or you can use
OBJ = $ (DIR: %. c = %. O)
The same is true.
Here, the replacement reference rule in makefile is used to replace another variable with the variable you specified.
Its standard format is
$ (VaR: A = B) or $ {var: a = B}
It means to replace a with B at the end of each value in the VaR variable.
Today, when studying makefile, I saw an article on the internet, introducing how to use the wildcard function to get all the C language source program file names in the specified directory. This is good, so you don't have to manually specify the files to be compiled one by one. c file. The method is as follows:
Src = $ (wildcard *. c)
It is equivalent to specifying to compile all. c files in the current directory. If there are subdirectories, such as the subdirectory Inc, then add a wildcard function, as shown in the following code:
Src = $ (wildcard *. c) $ (wildcard INC/*. c)
You can also specify the Assembly source program:
Asrc = $ (wildcard *. s)