FPGA drive AD9854 major bug-resolved!

Today, I am in a very good mood, because today I finally called out the sine wave and finished debugging for almost two or three weeks. But the process is speechless ......

In the previous article, I soon did not consider the direction of time series constraints, because I found that the previous simple project will have this warning without affecting the results, so I will not consider this direction. In the afternoon, I went to the students to discuss the problem. The students looked at the program, and he was very depressed when my project file was written. So the students asked me to re-build the project on his computer in the same way, because the students used quartuⅱ 3.0 and mine was 11.0.

The UI of version 3.0 is really much different from that of my version, and the whole reconstruction process has been in operation for a long time. In addition, I found that the compilation process is extremely fast due to the low version considerations, it makes me have the desire to install 3.0.

The same method can be used on the senior computer to produce a sine wave! It's really speechless. Is it really a problem with the software version? Students told me that the only difference between a program and a program is whether an error occurs during pin configuration. However, I have checked it many times, and the configuration is correct.

But at this time, I found something strange. When you carefully observe the pin planner interface, you can see two options: voltage and current. Pull to option 1. voltage is 3.3 V by default, which is normal. The current option seems to be used for throttling (see figure ).

At the beginning, 24mA was set. Later I thought that the current used by DDS would be very large, because the chip was very hot. Was throttling due to the previous crash. Then I did not throttling all the pins and re-compiled and downloaded them. A miracle occurred !! Long-time illegal waveform !! It seems that 11.0 is too advanced, and the default limit is applied to the pin. Low versions are not taken into account, so it is easy to see all low versions.

The senior student is also surprised. This is the case because the senior student does not use the later version of Quartus, but he said it may be due to the current. In addition, there are several resistor throttling before the chip, and the current is very small. Add a throttling to limit the phenomenon.

Alas, after a long call, the phenomenon has finally occurred, and it is really suddenly open. However, there are still many things to learn. You must cheer up!

FPGA drive AD9854 major bug-resolved!