I/O interface to the address way __ computer system

In the computer control system, the memory and I/O interfaces are all connected to the same data bus on the CPU. When the CPU and the memory and I/O interface for data exchange, it involves the CPU with which I/O interface chip which port, or from the memory of which unit contact address selection problem, that is, addressing problems. This involves the I/O interface to address the way, usually there are two ways to address, one is I/O interface and memory unified address, the other is the I/O interface independent address.

I. I/o interface independent address mode

This method of addressing is to separate the memory address space from the I/O interface address space and not affect each other. With specialized input instruction (in) and output instruction (out) to complete I/O operations, such as the Z80 microprocessor's I/O interface is independent, it uses mreq and IORQ signal to distinguish between access memory address space or I/O interface address space, using read, write operation Signal, Distinguishes between read operations and write operations. Memory address decoding uses 16-bit address (A0~A15), can address 64KB of memory space, and I/O interface decoding only use address bus select、read low 8 bit (A0~A7), can address 256 I/O port space.

The I/O interface of 8086 microprocessor also belongs to the independent address way. It allows 64K 8-bit I/O ports and two numbered 8-bit ports that can be combined into a 16-bit port. The instruction system has both an input and output instruction to access a 8-bit port and an input and output instruction to access a 16-bit port.

8086 input and output instructions can be divided into two categories: one is the direct input and output instructions, (such as Inal,55h;out70h,ax), and the other is the indirect input and output instructions (such as Inax,dx;outdx,al), before performing the indirect input and output instructions, The access port number must be set first in the DX register.

Two, I/O interface and memory Unified address method

This approach does not distinguish between the memory address space and the I/O interface address space, all the I/O interface ports are treated as a unit of memory, each interface chip is arranged one or several with the memory unified number of address number. There is no specific input/output instruction, and all instructions for transmitting and accessing the memory can be used to operate on the I/O interface. M6800 and 6502 microprocessors as well as the INTEL51 series of 51, 96 series Single-chip Microcomputer is the use of I/O interface and memory unified address.

Two kinds of address methods have their own advantages and disadvantages, the main advantage of the independent addressing mode is the memory and I/O interface address space separate, not affect each other, decoding circuit is simpler, and has specialized I/O instructions, the program is easy to distinguish, and execution time is short, fast and good. The disadvantage is that the I/O port is accessed using only I/O directives, with limited functionality and the complexity of the microprocessor by using dedicated I/O cycles and dedicated I/O control lines. The main advantage of the unified address approach is that access to memory commands can be used for I/O operations, data processing function is strong, while the I/O interface with the memory part of the common decoding and control circuit. The disadvantage is that the I/O interface takes up part of the memory address space, and it is difficult to differentiate I/O operations in a program because of special I/O instructions.

The I/O interface is addressed by the selected microprocessor, and the interface design should design the I/O interface address decoder According to the method defined by the selected processor. However, the I/O interface of the microprocessor with independent address can also be designed as a unified address mode, such as in the 8086 system, the I/O interface port and memory can be integrated by hardware. When the signal or number is valid, so that the m/signal is at a high level, through the combination of external logic combination circuit, generate the memory read and write signals, the CPU can use a strong function, the use of flexible access to the internal instructions to the I/O port to achieve the read, write operations.