Logical Address virtual address physical address bus address difference

1. Logical Address

Logical Address is the most vague concept.

The explanation in understanding the Linux kernel is related to virtual addresses. Based on the concept of hardware MMU and Software Memory Management, you can refer to the second chapter of utlk memory addressing, I have a very detailed explanation.

However, the mips architecture processor used in the work is different. In the mips architecture perspective, the logical address is irrelevant to MMU, And the MIPs address space is divided, there is an offset between the kseg0 kseg1 address space and the actual physical address, that is, there is a linear relationship. It is a simple relationship without translation.

The same memory is linearly mapped to the two address spaces, regardless of whether the processor has MMU units, the two address spaces are divided (the difference between the two addresses is whether the cache is enabled by default ).

The logic address division of the MIPs processor must be handled by its internal logic circuit, without MMU.

2. Virtual Address

As a programmer, virtual addresses are the most widely heard. for programming in Linux or windows, the addresses operated by the program are all virtual addresses.

Virtual Address is a combination of hardware MMU and Software Memory Management to facilitate more efficient use of RAM. Memory Management is a big article. I will not talk about details here. For details, refer to the memory addressing chapter of utlk.

Logical Address virtual address can be operated by software developers Based on System Programming and bare coding.

3. physical address

For embedded development, the physical address must be clear,The physical address refers to the address that the processor chip sends to address space addressing. It corresponds to the electrical signal sent from the processor address pin.

Utlk is used for memory chip-level unit addressing. In a real development environment, this is not the case because the processor needs other peripherals besides Ram, such as NAND, SPI, serial (of course refers to the Controller of these peripherals.

The physical address is the address that the processor actually sends to its address bus. Who should the address access? Nand controller ?), This depends on the system bus arbitration of the device, that is, bus arbitration. Currently, common bus arbitration includes Axi ahba.

These bus schedulers are used to plan the physical address space of the processor.

Most processor manuals provide their address map, that is, the distribution of peripherals (registers) in the processor address space.

For the processor, the virtual address logical address is an input source. The processor converts these addresses (such as MMU) to physical addresses. The actual processor sends a physical address.

4 BUS address

BUS address is the most difficult concept to understand.

All the addresses can be called Bus addresses, because all devices in the development environment are connected to the bus, such as the Axi bus, APB bus, and PCI bus I2C bus SPI bus. There will be many types of address space.

In most cases, the BUS address = physical address. Why? The physical address is the address sent by the processor on the system bus, therefore, the physical address sent by the processor can be understood as the BUS address of the processor address space, which must be equal.

Most program operations use the processor as the master device, which sends out addresses and reads and writes data according to commands. BUS address = physical address

In one case, the main device is not the processor, and the DMA controller does not need to pass through the processor to operate Ram. This is because the DMA controller is also attached to the system bus, that is, the address space of the processor.

The address issued by the DMA controller is also a physical address.

In a special case, the BUS address is different from the physical address, that is, the PCI bus.

Because the PCI bus has address ing, this is because the PCI Controller has a bridge circuit, which maps I/O addresses to different physical addresses.

As you can imagine, the PCI Controller is attached to the processor's system bus, while the PCI bus at the other end expands some PCI devices.

If a PCI device has DMA capability and needs to operate Ram, then the RAM address displayed by the device should be the BUS address mapped from the system bus to the PCI bus.

The PCI ing is configured in the PCI Controller address window, which is generally an offset, therefore, the BUS address mapped to the PCI bus is not the physical address (also known as the system BUS address) of the ram in the processor system address space.

So the bus address! = Physical address.

Of course, the PCI Controller address window can be configured as a flat ing, and the bus address is the same as the physical address.

At this time, I will also think of a problem, that is, whether the I2C bus SPI bus will also have such a problem. In fact, I have to worry about this problem because the PCI bus supports the device as the master device, perform DMA.

The I2C SPI bus does not have such capabilities, but they still have their own address space, therefore, when operating the I2C SPI bus, we need to send an address to lock the device on its data line based on the protocol. This address is not the processor address space, but the address space of the corresponding bus.

After the above explanation, we can see that there are many address bus (Axi PCI I2C SPI) in any development environment, and there is a lot of address space.

The physical address is also the BUS address, just the processor system BUS address (such as Axi ahba.

Logical Address virtual address physical address bus address difference