LPC1768 Serial clock Configuration full resolution

Peripheral frequency is a relatively difficult to grasp knowledge, please follow my understanding can not be trusted other tutorials

Crystal oscillator bit 12MHZ

The configuration system_lpc17xx.c parameter values are as follows:

#define CLOCK_SETUP 1
#define SCS_VAL 0x00000020//system clock source->12m crystal oscillator
#define Clksrcsel_val 0x00000001
#define PLL0_SETUP 1
#define Pll0cfg_val 0x00050063//m N-bit PLL frequency multiplier parameters are 6 and 100, respectively
#define PLL1_SETUP 1
#define Pll1cfg_val 0x00000023
#define CCLKCFG_VAL 0x00000003//Phase-locked Loop output frequency division CPU clock CCLK=FCCO/4;
#define USBCLKCFG_VAL 0x00000000//No USB
#define PCLKSEL0_VAL 0x00000000//0x00000140//Peripherals Select whether to 1/4 of the primary clock based on the CPU clock
#define Pclksel1_val 0x00000000//0x00050000//Choose UART2, 3 main clock 1/4
#define Pconp_val 0x042887de
#define CLKOUTCFG_VAL 0x00000000

System initialization function:

void Systeminit (void)
{
#if (clock_setup)/* CLOCK SETUP */
Lpc_sc->scs = Scs_val;
if (Scs_val & (1 << 5)) {/* If Main oscillator is enabled */
while (Lpc_sc->scs & (1<<6) = = 0);/* Wait for oscillator to is ready */
}

Lpc_sc->cclkcfg = Cclkcfg_val; /* Setup Clock Divider */

#if (Pll0_setup)
Lpc_sc->clksrcsel = Clksrcsel_val; /* Select Clock Source for PLL0 */

Lpc_sc->pll0cfg = Pll0cfg_val; /* Configure PLL0 Set M and N Value */
Lpc_sc->pll0feed = 0xAA;
Lpc_sc->pll0feed = 0x55;

Lpc_sc->pll0con = 0x01; /* PLL0 Enable Lock M and N Value */
Lpc_sc->pll0feed = 0xAA;
Lpc_sc->pll0feed = 0x55;
while (!) ( Lpc_sc->pll0stat & (1<<26));/* Wait for PLOCK0 STAT include M and N */

Lpc_sc->pll0con = 0x03; /* PLL0 Enable & Connect */
Lpc_sc->pll0feed = 0xAA;
Lpc_sc->pll0feed = 0x55;
while (!) ( Lpc_sc->pll0stat & (1<<25) | (1<<24))); * Wait for Pllc0_stat & Plle0_stat * *
#endif

#if (Pll1_setup)
Lpc_sc->pll1cfg = Pll1cfg_val;
Lpc_sc->pll1feed = 0xAA;
Lpc_sc->pll1feed = 0x55;

Lpc_sc->pll1con = 0x01; /* PLL1 Enable */
Lpc_sc->pll1feed = 0xAA;
Lpc_sc->pll1feed = 0x55;
while (!) ( Lpc_sc->pll1stat & (1<<10));/* Wait for PLOCK1 */

Lpc_sc->pll1con = 0x03; /* PLL1 Enable & Connect */
Lpc_sc->pll1feed = 0xAA;
Lpc_sc->pll1feed = 0x55;
while (!) ( Lpc_sc->pll1stat & ((1<< 9) | (1<< 8))); * Wait for Pllc1_stat & Plle1_stat * *
#else
Lpc_sc->usbclkcfg = Usbclkcfg_val; /* Setup USB Clock Divider */
#endif

Lpc_sc->pclksel0 = Pclksel0_val; /* Peripheral clock Selection CCLK/4 CPU Clock of 1/4 */
Lpc_sc->pclksel1 = Pclksel1_val;

Lpc_sc->pconp = Pconp_val; /* Power Control for Peripherals 0x042887de=1110 1111 1110 1111 1111 0111 1101 1110 * *

Lpc_sc->clkoutcfg = Clkoutcfg_val; /* Clock Output Configuration */
#endif

#if (Flash_setup = = 1)/* FLASH Accelerator SETUP */
Lpc_sc->flashcfg = Flashcfg_val;
#endif
}

Clock configuration results:

fosc=12000000=12m

fcco=2*fosc*100/6=400m

fcclk=fcco/4=100m

Data corresponding to pclksel0_val corresponding bit 00-"1/4-way peripheral baud rate bit 25M

01-"Indicates the frequency of the peripheral (e.g. serial port) is 100M

Serial Port initialization:

void Uart0_init (void)
{
uint16_t Usfdiv;
/* UART0 */
Lpc_pincon->pinsel0 |= (1 << 4); /* Pin P0.2 used as TXD0 (COM0) */
Lpc_pincon->pinsel0 |= (1 << 6); /* Pin P0.3 used as RXD0 (COM0) */

LPC_UART0->LCR = 0x83; /* Allow baud rate to be set */
/*
Usfdiv = (FPCLK/16)/uart0_bps; Set baud rate
LPC_UART0->DLM = usfdiv/256;
Lpc_uart0->dll = usfdiv% 256;

LPC_UART0->LCR = 0x03;
LPC_UART0->FCR = 0x06;
*/

If the frequency is 25MHZ baud rate 115200

LPC_UART0->FDR = (2<<4) | 1;
LPC_UART0->DLM = 0;
Lpc_uart0->dll = 9;
LPC_UART0->LCR = 0x03; Lock baud rate


LPC_UART0->FCR = 0xc7;
/*
LPC_UART0->FDR = (14<<4) | 9;
LPC_UART0->DLM = 0;
Lpc_uart0->dll = 33;
LPC_UART0->LCR = 0x03; Lock baud rate


LPC_UART0->FCR = 0xc7;
*/
/*
Nvic_setpriority (uart0_irqn,1);//uart0_int_priority);
NVIC_ENABLEIRQ (UART0_IRQN);
Lpc_uart0->ier = 0x03;
*/
}

The parameter configuration rules are as follows:

Determine peripheral frequency fpclk (usually 25M or 100M)

The FDR register is configured as follows: Bits 3:0 is Divaddval 7:4 for Mulval (>=1);

uartnbaudrate=pclk/(16* (256*undlm+undll) * (1+ (divaddval/mulval)))

1.1<=mulval<=15

2.0<=divaddval<=14

3. Divaddval<mulval

Examples are as follows:

pclk=12mhz,br=115200

The formula learns that dlest=pclk/(16*BR) =6.51 is not an integer

Then use frest=1.5 to determine the value of the Dlest dlest=int (pclk/(16*br*1.5)) = 4;

frest=pclk/(16*br*dlest) =1.625 (1.1<frest<1.9)

1.628 Data in table table 1.625 adjacent to 1.625

The actual serial port rate of 115384 and 115200 has a 0.16% error but does not affect the normal operation of the serial port

LPC1768 Serial clock Configuration full resolution