Nested execute make
In some big projects, we place the source files of different modules or different functions in different directories. we can write a makefile for this directory in each directory, this makes our makefile more concise, instead of writing everything in a makefile, which makes it difficult to maintain our makefile, this technology is of great benefit to our module compilation and multipart compilation.
For example, we have a subdirectory named subdir, which has a MAKEFILE file to specify the file compilation rules in this directory. The makefile of the general control can be written as follows:
Subsystem:
CD subdir & $ (make)
It is equivalent:
Subsystem:
$ (Make)-C subdir
The definition of $ (make) macro variable means that our make may need some parameters, so defining it as a variable is more conducive to maintenance. In both examples, the "subdir" directory is first entered, and then the make command is executed.
We call this makefile "Master makefile". the variables of the master makefile can be passed to the lower-level makefile (if you show the Declaration), but will not overwrite the variables defined in the lower-level makefile, unless the "-e" parameter is specified.
If you want to pass the variable to the lower-level makefile, you can use the following declaration:
Export <variable...>;
If you do not want some variables to be passed to lower-level makefile, you can declare them as follows:
Unexport <variable...>;
For example:
Example 1:
Export variable = Value
It is equivalent:
Variable = Value
Export variable
It is equivalent:
Export variable: = Value
It is equivalent:
Variable: = Value
Export variable
Example 2:
Export variable + = Value
It is equivalent:
Variable + = Value
Export variable
If you want to pass all the variables, you only need one export. You don't need to talk about anything next to it, indicating that all variables are passed.
Note that there are two variables: shell and makeflags. Whether export or not, these variables are always passed to the lower makefile, especially the makefiles variable, it contains the make parameter information. If the make parameter is defined in the upper-layer makefile when we execute the "general control makefile", The makefiles variable will be these parameters, it is passed to the lower-level makefile. This is a system-level environment variable.
But there are several parameters in the make command that are not passed down. They are "-c", "-F ", "-h", "-o", and "-W" (details about makefile parameters will be described later). If you do not want to pass parameters to the lower layer, you can do this:
Subsystem:
CD subdir & $ (make) makeflags =
If you define the environment variable makeflags, you must be sure that the options are used by everyone. If "-T", "-n ", and the "-Q" parameter will lead to unexpected results, and may cause you to panic abnormally.
There is also a useful parameter in "nested execution". "-W" or "-- print-directory" will output some information during the make process, let you see the current working directory. For example, if our lower-level make directory is "/home/hchen/GNU/make" and we use "make-W" for execution, when we enter this directory, we will see:
Make: Entering directory '/home/hchen/GNU/make '.
When you exit the directory after completing the lower-layer make, we will see:
Make: Leaving directory '/home/hchen/GNU/make'
When you use the "-c" parameter to specify the lower makefile of make, "-W" will be automatically opened. If the parameter contains "-s" ("-- slient") or "-- no-print-directory", "-W" is always invalid.
Original
Http://wiki.ubuntu.org.cn/index.php? Title = % E8 % B7 % 9f % E6 % 88% 91% E4 % B8 % 80% E8 % B5 % B7 % E5 % 86% 99 makefile: % E4 % B9 % a6 % E5 % 86% 99% E5 % 91% BD % E4 % BB % A4 & variant = ZH-HANT