1. NIOS2 DMA controller Structural block diagram
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Like other IP peripherals, the DMA controller also implements the register configuration and data reading and writing functions via the Avalon mm bus.
2. NIOS2 DMA three modes of transmission
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3. NIOS2 DMA API function
NIOS2 DMA API function prototypes are defined in the ALT_DMA.H header file, the usual API functions are as follows:
alt_dma_txchan alt_dma_txchan_open (const char* name); static alt_inline int alt_dma_txchan_send (alt_dma_txchan dma, const void* from, alt_u32 length, alt_txchan_done* done, void* handle) { return dma ? dma->dma_send (dma, from, length, done, handle) : -enodev;} static alt_inline int alt_dma_txchan_ioctl (alt_dma_txchan dma, int req, void* arg ) { return dma ? dma->ioctl (Dma, req, arg) : -ENODEV;} alt_dma_rxchan alt_dma_rxchan_open (Const char* dev);static alt_inline int alt_dma_rxchan_prepare (alt_dma_rxchan dma, void* data, alt_u32 len, alt_rxchan_done* done, void* handle) { &Nbsp;return dma ? dma->prepare (Dma, data, len, done, handle) : -enodev;} static alt_inline int alt_dma_rxchan_ioctl (alt_dma_rxchan dma, int req,      VOID*          ARG) { return dma ? dma->ioctl (Dma, req, arg) : -enodev;}
4. Reference Design--onchipmenmory to SDRAM
1) Qsys Settings
The NIOS2 code runs in SDRAM, and onchipmemory acts as an on-chip storage peripheral.
The following two figures are the IP settings in the Qsys, which shows that DMA supports burst read-write mode, which can greatly improve efficiency.
In the second picture, the blogger checked the show signals option to see the signal interface defined by the DMA component, a Avalon mm slave port for the configuration register, two Avalon mm Masters to read and write, and an IRQ interrupt output, Generates an interrupt signal to the CPU.
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2) Software source code
File name:main.c//date:2016.8.15//author:shugen.yin//function:dma, onchip memory to sdram/ddr2//log: #include <stdio.h> #include <string.h> #include <sys/alt_ irq.h> #include "system.h" #include "alt_types.h" #include "sys/alt_dma.h" #define dat_len 32unsigned int buffer0[dat_len/4];unsigned int *point=onchip_memory1_0_base;static void dma_init (void); //initialization Dmaunsigned int dma_end_flag = 0;alt_dma_txchan tx;alt_dma_rxchan rx;void dma_done () {dma_end_flag++;} Static void dma_init (void) {Tx = alt_dma_txchan_open ("/dev/dma_0"); if (tx != null) {printf ("dma transition start\n");} Alt_dma_txchan_ioctl (tx,alt_dma_set_mode_32,null);//point is the source address, the length of the transmitted data block is Dat_lenalt_dma_txchan_send (tx, Point, dat_len, null, null); Rx = alt_dma_rxchan_open ("/dev/dma_0"); Alt_dma_rxchan_ IOCTL (Rx,alt_dma_set_mode_32,null);//buffer0 is the destination address, the length of the transmitted data block is Dat_len, Dma_done () is the callback function called after the DMA is completed Alt_dma_rxchan_prepare (RX,&NBSP;BUFFER0 , dat_len, dma_done, null);} Int main () {int i;for (i=0;i<dat_len/4;i++) buffer0[i] = 0;for (i=0;i<DAT_LEN/4;i++) * ( Point+i) = i+1;//initializes the Dmadma_init ();//waits for the end of the interrupt, indicating that the transfer is complete while (dma_end_flag == 0) {}//Prints the data for the receive address for ( i=0;i<dat_len/4;i++) {printf ("buffer0[%d]=%d\t", I,buffer0[i]);} Alt_dma_txchan_close (TX); Alt_dma_rxchan_close (rx); return 0;}
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NIOS2 essay--DMA (1)