1.IIC
2.SPI
3.8080/8600
4.RGB interface
5.mipi_dsi
6.TFT interface
7.MCU Working characteristics
1.IIC
- I²c bus, is the abbreviation of inter-integrated circuit. Inter-ic means the integrated circuit used for interaction, which consists mainly of two-way serial clock line SCL and bidirectional serial data line SDA two lines.
- I²c Bus is a serial bus introduced by pHLIPs company, which is a high performance serial bus with multi-host system, including bus verdict and high-low speed device synchronization function.
- The I²C bus has only two bidirectional signal lines. One is the data line SDA and the other is the clock line SCL.
The I²c bus uses a pull-up resistor to connect the positive supply. When the bus is idle, the two lines are high. The low level of the output of any device connected to the bus will lower the signal of the bus, that is, the SDA and SCL of each device are both line "and" relationship.
Each device connected to the I²C bus has a unique address. The data transfer between the host and other devices can be sent from the host to other devices, the host is the transmitter. The device receiving data from the bus is the receiver.
- Host: The device that initiates sending, generates a clock signal, and terminates the transmission, which can be a transmitter or receiver. The host is usually a microprocessor.
- Slave: The device addressed by the host, it can be a transmitter or receiver, in a multi-host system, there may be several hosts attempting to start the bus to transmit data. To avoid confusion, the I²c bus will be arbitrated by bus to determine which host controls the bus.
In the serial bus extension of 80C51 SCM application System, we often meet the single-host case of 80C51 single-chip microcomputer and other interface devices as slave machines.
The main advantage of the I²C bus is its simplicity and effectiveness. Because the interface is directly above the component, the I²c bus occupies very little space, reduces the board space and the number of chip pins, and reduces the interconnection cost. The bus can be up to 25 feet in length and can support 40 components at the maximum transfer rate of 10Kbps. Another advantage of the I²C bus is that it supports multi-master multimastering, where any device capable of sending and receiving can become the main bus. One master controls the transmission and clock frequency of the signal. Of course, there can only be one master at any point in time.
2. SPI
2.1 SPI Interface Overview
- The SPI bus is a serial peripheral interface that is a high-speed, full-duplex, synchronous communication bus that occupies only four wires on the chip's pins.
- The SPI communication principle is simple, it works in a master-slave manner, usually with one main device and one or more slave devices, requiring at least 4 wires.
- SPI interface is full duplex, synchronous, serial port, single host.
Pin Definition:
- sdo– Master device data output, from device data input
- sdi– Master device data input, from device data output
- The sclk– is used to provide synchronous clock signals for data communication, which is generated by the main device
- cs– from the device enable signal, controlled by the main device
2.2 internal structure of the SPI slave
- The SPI slave obtains the clock and the chip selection signal from the host, so both CS and SCLK are input signals.
- SPI interface in the internal hardware is actually a simple shift register, the data transmitted is 8 bits, the main device generated from the device enable signal and the shift pulse, the bitwise transmission, high in front, low post.
2.3 SPI Bus
If an SPI slave is not selected, his data output SDO will be in a high-impedance state, thereby isolating itself from the current active state.
Addressing:
-Mosi:when master, out line; When slave, on line
-Miso:when master, in line; When slave, off line
- SPI bus in a single data transfer process, the interface can only have one host and a slave to communicate. Also, the host always sends a byte of data to the slave, and the slave always sends a byte of data to the host machine.
- In the SPI transmission, the data is sent and received synchronously.
- The data transfer clock is based on the clock pulse of the autonomous processor,
- When the SPI interface has a plurality of SPI interface microcontroller, should distinguish its master-slave status, in a moment only by a single-chip microcomputer-based device.
- The device can receive or transmit data to the host only when the host sends commands.
- The transmission format of its data is high (MSB) in front, Low (LSB) at the rear
- One disadvantage of the SPI interface: there is no response mechanism to confirm receipt of the data.
- In the case of only write operations, the host simply ignores the bytes received, and conversely, if the host is to read one byte of the peripheral, it must send an empty byte to raise the slave's transmission.
2.4 Advantages and disadvantages
- Disadvantages:
(1) Lack of flow control mechanism, regardless of the main device or the device is not to confirm the message, the main device can not know whether the device is busy. Therefore, the need for software to compensate, increase the workload of software development.
(2) There is no multi-master device protocol, it is necessary to use complex software and external logic to realize the multi-master device architecture.
- Advantages:
(1) The interface is simple, it is advantageous to the hardware design and realization.
(2) clock speed is fast and there is no system overhead.
(3) Strong relative anti-jamming ability, stable transmission
3. The difference between 8080 and 6800 timing
- 6800 is also called the Moto Bus, 8080 bus is also called the Intel Bus.
- Roughly speaking, the Intel bus control line has four, RD write enable, WR read Enable, ale address latch, CS chip Select. And Moto Bus only three, r/w read/write, ale address latch, CE chip enable.
- The difference between 6800 and 8080 is mainly the control mode of the bus. For memory storage, the data bus and address bus are required, which are all the same.
- But for access control, they take a different approach:
- 8080 reads and writes through the Read enable (RE) and write enable (WE) two control lines.
- 6800 is done through the "total Enable (E)" and "Read and write Selection (W/R)" Two control lines.
4. RGB interface
The 4.1 RGB interface is now available in three main ways: 16bit, 18bit, 24bit
- 16bit RGB Data bit is R1-R5,G0-G5,B1-B5, the display scale is r:g:b 5:6:5, can display the color quantity is 65k kind of color;
- The 18bitRGB data bit is R0-R5,G0-G5,B0-B5, the display scale is r:g:b 6:6:6, can display the color to be the 262k kind of color.
- The 24bitRGB data bit is R0-R7,G0-G7,B0-B7, the display scale is r:g:b 8:8:8, can display the color to be the 16M kind of color.
In addition to the RGB interface data cable, the RGB interface Connection mode also requires Mck,hsync and vsync three clock line to ensure that the RGB interface data according to the correct timing by the CPU to the LCD transmission, wherein the MCK is the system clock, provides a stable square-wave clock, hsync for the line synchronization signal, The VSync is the field synchronization signal.
4.2 RGB Interface Operating characteristics
The MCU with the RGB interface is generally more powerful, there is a specialized interface circuit, the RGB interface of the driver IC removed an interface circuit (that is, CPU interface processing Command/data IO circuit), it is necessary to provide the MCU RGB interface with the system interface is a high-speed port, It requires an external clock as well as a line, frame sync signal, and the conversion of the data to the corresponding voltage to the panel. h/v two field sync signals.
5. Mipi_dsi
MIPI-DSI (Mobile industry processor interface) is the abbreviation for mobile industry Processor interface.
The MIPI Alliance is an open membership organization. In July 2003, 4 companies from Texas Instruments (TI), STMicroelectronics (ST), UK arm, and Nokia, Finland were established.
The MIPI Alliance is designed to promote standardization of processor interfaces for mobile applications. The organization has assembled the industry's oldest hardware and software manufacturers, including the largest mobile phone chip manufacturers Ti, Audio-visual multimedia chip leader Italian law, the global handset giant Nokia and processor core leader arm, as well as the handset operating system originator Symbian. With the accession of Freescale, Intel, Samsung, Ericsson and other heavyweight manufacturers, MIPI has gradually been recognized by the International Organization for Standardization.
MIPI-DSI PIN Definition
- Mipi_clock_p i:positive polarity of low voltage differential CLOCK signal
- Mipi_clock_n i:negative polarity of low voltage differential CLOCK signal
- Mipi_data_p I/O: Positive polarity of low voltage differential DATA signal
- Mipi_data_n I/O: negative polarity of low voltage differential DATA signal
6. TFT interface
- MCU mode: Currently the most commonly used connection mode, usually 80 system (68 system no longer exists). Data bits are transmitted in 8-bit, 9-bit, 16-bit, and 18-bit. The connection is divided into: cs/rs (Register selection), rd/,wr/, and then the data line. The advantages are: control is simple and convenient, no clock and synchronous signal. The disadvantage is: to consume gram, so it is difficult to achieve large (QVGA above);
- RGB mode: Large screen with more modes, data bit transmission also has 6 bits, 16 bits and 18 bits of points. Wiring generally has: vsync,hsync,dotclk,vld,enable, the rest is the data line. Its advantages and disadvantages are just the opposite of MCU mode.
- SPI mode: Use less, connect to cs/,slk,sdi,sdo four lines, less wiring but software control is more complex
- VSync Mode: This mode adds a vsync (frame sync) signal line in MCU mode, which is applied to the motion picture update.
7. MCU operating characteristics
- The driver ICS for the LCD of the MCU interface are all with Gram,driver
IC as a piece of MCU coprocessor, accept the MCU sent over the Command/data, can be relatively independent work; CPU interface is often said that the system interface includes 80, 68 and the serial port, 80 as an example package 18/16/9/8
Bits transmission form, the 18-bit interface is RGB is 6-bit data, through the LCD Driver IC processing to convert 6-bit data to a gray-scale voltage to the panel.
- For the CPU interface of the LCM, its internal chip is called the LCD driver. The main function is to change the data/commands sent by the host to each
Pixel RGB data so that it is displayed on the screen. This process does not require a point, line, or frame clock.
Overview of common display interfaces for protocols
