Relationship between Linux embedded systems and hardware platforms

I. embeddedSystemDesignBackground of method change

Embedded SystemThe evolution of design methods is generally due to the traction of application requirements and the promotion of IT technology.

With the continuous innovation and development of microelectronics technology, the integration and process level of large-scale integrated circuits are constantly improved. The combination of Silicon Materials and human intelligence has produced a large number of low-cost, high-reliability and high-precision micro-electronics structure modules, promoting the development of a new technical field and industry. On this basis, the developed device programmable idea and microprocessor technology can be used to change and implement hardware functions. A wide range of applications, such as microprocessor and various programmable large-scale integrated dedicated circuits and semi-customized devices, have created a brand new application world, it has even extensively influenced and is gradually changing social activities such as human production, life and learning.

The performance of the computer hardware platform is greatly improved, so that many complex algorithms and easy-to-use interfaces are implemented, which greatly improves the work efficiency and provides a physical foundation for the auxiliary design of complex embedded systems.

High-performance integrated EDA development tools (platforms) have been greatly developed, and their automation and intelligence are constantly improved to provide a complexEmbedded SystemThe design provides an easy-to-learn and easy-to-use integrated development environment for editing, layout, wiring, compilation, synthesis, simulation, testing, verification, and device programming for different purposes and levels.

The development of hardware description language (HDL) provides a working medium for the design of complex electronic systems to establish various hardware models. Its descriptive and abstract capabilities bring significant changes to the design of hardware circuits, especially semi-customized large-scale integrated circuits. Currently, many of them have been used as follows: the IEEE-based VHDL (std1076), the IEEE Std 1364-standard OpenGL, and the enterprise-standard ahdl of Altera.

Due to the development and standardization of HDL, there have been a number of companies in the world that use HDL to design various functional modules of integrated circuits. Its task is to describe the functions and structure of the integrated circuit with HDL Based on common or dedicated functions, and form different levels of IP kernel modules through different levels of verification, it is used by chip designers for assembly or integration.

The IP (intellectual property) kernel module is a pre-designed or even verified integrated circuit, device, or component with a certain deterministic function. It has several different forms. The IP kernel module has three levels of design: behavior, structure, and physical.Soft IP Kernel(Soft IP core), firm IP core, and hard IP core, which is based on the physical description and verified by the process). This is equivalent to the design technology of rough, semi-finished and finished products of Integrated Circuits (devices or components.

The Soft IP kernel is usually submitted to users using some type of HDL text. It has been behavior-level design optimization and functional verification, but does not contain any specific physical information. Based on this, the user can combine the correct portal circuit-level network table and carry out subsequent Structural Design with maximum flexibility, it is easy to integrate EDA integrated tools with other external logic circuits and design devices with different performance based on different semiconductor processes. Soft IP kernels that can be commercialized generally contain more than 5000 total circuit structures. However, an improper design may cause the entire result to fail. The Soft IP kernel is also called a virtual device.

The hardware IP core is a physical design based on a certain semiconductor process. It has a fixed topology layout and a specific process, and has been verified by the process, with guaranteed performance. It is provided to users in the form of physical circuit structure mask layout and a full set of process files, is a full set of technology that can be used.

The design depth of the solid IP kernel is between the Soft IP kernel and the hard IP kernel. Apart from completing all the design of the hard IP kernel, also completed the design of the door circuit level synthesis and timing simulation. It is generally submitted to the user in the form of a portal circuit-level network table.

Ti, Philips, Atmel, and other manufacturers are authorized by Intel to use their MCS51 IP kernel modules in combination with their own expertise to develop a personalized and Intel MCS51 compatible microcontroller.

Common IP kernel modules have various CPUs (32/64-bit CPU or 8/16-Bit Microcontroller/single-chip microcomputer, such as 8051) and 32/64-bit dsp (such as 320c30) DRAM, SRAM, EEPROM, flashmemory, A/D, D/A, MPEG/JPEG, USB, PCI, standard interface, network unit, compiler, encoding/decoder, and simulator module. A wide range of IP core module libraries provide a basic guarantee for the Rapid Design of dedicated integrated circuits and Single-Chip Systems and the rapid occupation of the market.

Advances in software technology, especiallyEmbeddedThe launch of the real-time operating system EOS (embedded operation system) is a complexEmbedded SystemApplication software provides underlying support and an efficient development platform. EOS is a real-time multi-task system software with powerful functions and wide application. It generally has various system resource management functions of the operating system. You can use the application interface API to call functions to manage various resources. User programs can be developed and run on the basis of EOS. Compared with OS in general-purpose system machines, it mainly has the characteristics of short and precise system kernels, low overhead, strong real-time performance and high reliability. The complete EOS also provides drivers for various devices. To adapt to network applications and Internet applications. You can also provide TCP/IP support. Currently, the popular EOS companies include 3Com's Palm OS, Microsoft's Windows CE and Windows NT embedded4.0, Tokyo University's Tron, various open-source embedded Linux, and kiss group, which has been successfully developed in China. and HBOS of Zhejiang University.

Ii. Changes in Embedded System Design Methods

In the past, programmers who were good at software design generally took the lead in designing hardware circuits. hardware design and software design were considered completely different in nature.

With the development of electronic information technology, electronic engineering designers often gradually get involved in software programming. The main form is to learn the corresponding assembly language programming through the application of micro-controllers (commonly referred to as single-chip microcomputer in China. When designing a large-scale distributed control system, it is necessary to use a popular PC as the upper-end machine, so as to further learn how to use Quick BASIC, C, C ++, VC, VB, and other advanced language programming system programs, design the system interface, through multi-machine communication with the microcontroller-controlled front-end machine to form a centralized distribution control system.

Software Programming designers are rarely interested in learning application circuit design. However, with the rapid development of computer technology, especially the invention of hardware description language (HDL), the hardware design method of the system has changed, the hardware composition and behavior of the digital system can be described and simulated using HDL. In this case, designing a hardware circuit is no longer a hardware design engineer's patent, designers who are good at software programming can use HDL tools to describe the behavior, function, structure, data stream, signal connection relationship and timing relationship of hardware circuits, and design hardware systems that meet various requirements.

EDA tools allow two design input tools to adapt to the needs of hardware circuit designers and software programmers in two different backgrounds. Let designers with a hardware background use the used schematic input method, while those with a software background use the hardware description language input method. Due to the use of the HDL description for input, it is closer to the system Action Description and easier to integrate, transfer and modify the time domain. It is also possible to establish a design file independent of the process, those who are good at software programming, once having mastered the HDL and some necessary hardware knowledge, can often design better hardware circuits and systems than those who are used to traditional design engineers. Therefore, engineers accustomed to traditional design should learn to use HDL to describe and program.

3. Three Layers of Embedded System Design

The embedded system design has three different layers:

1. Level 1: Design Method Using pcb cad software and ice as the main tool.

This is a method that has been used by the designers of MCU application systems in China until now. The steps are abstracted and then specific.

Abstract Design is mainly based onEmbeddedThe functional requirements to be implemented by the application system are refined into several functional modules, the system function diagram is drawn, and the hardware and software functions of the functional modules are allocated.

The specific design includes hardware design and software design. The hardware design mainly selects and combines the components required by each functional module according to the performance parameter requirements. The basic principle of the selection is the most cost-effective general-purpose components that can be purchased on the market. If necessary, you must perform a test, function test, and performance test on the uncertain parts, find a relatively optimized solution from the module to the system, and draw a circuit schematic diagram. The key step in hardware design is to use the computer-aided design (CAD) software of Printed Board (PCB) to layout and wiring system components, followed by printed board processing, assembly and hardware debugging.

Software design is the biggest part of the workload. Software design runs through the entire system design process, including task analysis, resource allocation, module division, process design and refinement, coding and debugging. The workload of software design is mainly focused on program debugging, so software debugging tools are the key. The most common and effective tool is the online simulator (ICE ).

2. Level 2: Design Method Using EDA tool software and EOS as the development platform.

With the development of microelectronics technology, various general programmable semi-custom logic devices have emerged. In hardware design, designers can use these semi-customized devices to gradually build several standard logical devices that were originally connected through printed board lines into dedicated Integrated Circuits (ASIC, the layout and wiring complexity of the printed board are converted into the configuration complexity of the half-customized device. However, the design of semi-custom devices does not require the knowledge and experience of the semiconductor process and in-chip IC layout and wiring. As the scale of the half-customized device grows, more and more devices can be integrated, resulting in less and less cost for the line, assembly, and debugging of the devices connected to the printed board, this not only greatly reduces the area of the printed board and the number of connectors, but also reduces the overall cost of the system and increases the flexibility of programmable applications. More importantly, it reduces the power consumption of the system and increases the operating speed of the system, this greatly improves system reliability and security.

In this way, hardware designers have gradually switched from choosing and using standard general-purpose integrated circuit devices to designing and making some specialized integrated circuit devices, these technologies are supported by various EDA tools and software.

The semi-custom logic device has gone through the development of Programmable Logic Array PLA, programmable Array Logic pal, General Array Logic gal, Complex Programmable Logic Device CPLD and Field Programmable Gate Array FPGA. The trend is that the integration and speed are constantly increasing, the functions are constantly enhanced, the structure tends to be more reasonable, and the use becomes more flexible and convenient.

Designers can use a variety of EDA tools and standard CPLD and FPGA to design and build large-scale integrated circuits dedicated to users. Then, through the bottom-up design method, we design self-made integrated circuits, programmable peripheral devices, the selected ASIC andEmbeddedThe microprocessor or microcontroller layout and wiring on the printed board constitute a system.

3. Layer 3: Design Method Based on the IP kernel library and using software/hardware collaborative design technology.

After 1990s, we began to shift from an integrated circuit-level design to an integrated system-level design. At present, the SOC (system o-n a chip) design stage has been entered, and the practical stage has started. This design method does not simply integrate all the integrated circuits required by the system into one chip, it is impossible to achieve the high density, high speed, high performance, small size, low voltage, low power consumption and other indicators required by the monolithic system, especially the low power consumption requirements. The design of a single-chip system is based on the performance requirements of the entire system. The microprocessor, model algorithm, Chip structure, peripheral devices, and various levels of circuits are closely integrated into the design of the device, in addition, through the collaborative design of system software and hardware based on the new concept, the entire system function is completed on a single chip. Sometimes the system may be deployed on several chips. Because, in fact, not all systems can be implemented on one chip; it may also be because the technical cost of implementing a single chip system is too high, so that the business value is lost. Currently, a single-chip system is a simple single-chip system, such as a smart IC card. However, several famous Semiconductor manufacturers are developing and developing complex monolithic systems such as single-chip PCs.

It is neither realistic nor necessary to design a single-chip system from scratch. In addition to immaturity and time-tested design, the system performance and quality cannot be guaranteed, and the business value will be lost because the design cycle is too long.

To speed up the design cycle of a single-chip system and improve the reliability of the system, one of the most effective ways is to use mature and optimized IP kernel modules for design integration and secondary development through authorization, these IP kernel modules are embedded into the SOC using the glue Logic Technology GLT (glue logic technology. The IP kernel module is the basis for the design of a single chip system. The purchase of which level of IP kernel module should be determined based on the current basis, time, capital and other conditions. Buying a hard IP kernel module is the least risky, but the biggest contribution is inevitable. However, purchasing an IP kernel module not only reduces development risks, but also reduces development costs. Generally, the cost for purchasing an IP kernel module is lower than the cost for independent design and verification. Of course, not all the required IP kernel modules can be purchased from the market. To monopolize the market, key IP kernel modules developed by some companies (at least temporarily) are unwilling to be authorized for transfer and use. An IP kernel module like this has to organize its own strength for development.

Each of these three layers has its own application scope. From the perspective of application development, the first two methods are used for a long period of time. 3rd the hierarchical design method can only be used to design a simple monolithic system for specific applications. However, complex monolithic systems can be designed and implemented by some large Semiconductor manufacturers, only application systems that are widely used and have a certain scale are worthy of development. Some application systems are not suitable for single-chip implementation because of technical issues or commercial value issues. When they launch the corresponding single-chip system in the form of products, the application staff only need to choose. Therefore, the three levels of Design Methods coexist and will not simply replace the former with the latter. Junior Application designers will focus on 1st methods, and experienced designers will focus on 2nd methods; very professional designers will use 3rd methods to design and apply a simple monolithic system. However, all the designers can use the dedicated monolithic system designed in 3rd Methods launched by large Semiconductor manufacturers.

Iv. Conclusion

At present, the three levels of design in China are in the "surface", "line", "point" status. Electronic information system designers who are used to the design of 1st levels need to gradually transition and develop to 2nd levels, and the design of 2nd levels should gradually develop from "line" to "surface "; 3rd the hierarchical design method requires the relevant national departments to organize various efforts to tackle and coordinate development in accordance with the IT development strategy and planning. 3rd hierarchical design methods should gradually evolve from "points" to "lines ".

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