S3c2440 bare board (I)-storage controller

The expansion method of jz2440 sdram is as follows:

1. The bank selects the line, address line, and slice line selection in the same group, but uses the data line to distinguish the high position. Write 16-bit data at a high level to the same address of two sdram, thus forming a 32-bit data bus at the mcu end.

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2. Address line calculation method:

1) identify the number of banks on the chip from the SDRAM chip data 4), the number of storage units on each BANK 4 M) and the chip output data Bit Width 16 bit)
2) determine the number of banks. Use several address lines to select two for the BANK)
3) the number of storage units in each BANK determines the number of root address lines to be used for the selection of 22 storage units)
4) the output data Bit Width of the chip determines the 32-bit width of the connection between the first address line and the 0th address lines of the SDRAM, and the third step of the mcu is the addr0 of the sdram)
Example:
Two HY57V561620 chips are used to form a 32-bit output data Bit Width. Each chip is composed of four banks and each BANK is 4 MB in size. Two address lines are used for BANK selection, each BANK has a storage unit of 4M4M = 2 ^ 22), 22 address lines are used for the storage unit selection, and 2 BANK is shared here) + 22 storage unit) = 24 address lines, also because the output data bit width is 32 bits, 4 byte alignment, so will use mcu end address line A2-A25, A0-A1 is not used. While A24 and A25 are used for BANK selection, and 22 address lines starting from A2 are used for storage unit selection.