The cache is a smaller, but faster-to-access memory. Because the processor is much faster than main memory, the processor accesses the data directly from in-store to wait for a certain period, while the cache is located between the processor and main memory, preserving the contents of the main memory block involved in the most recent time processor. When it is necessary to read the data, the processor may read the required data from the cache instead of fetching the data from the main memory, thus improving the system's operational efficiency.
To put it simply, the cache is the middle tier introduced to compensate for the gap between high-speed devices and low-speed devices, and ultimately the role of * * to speed up access.
In the chip, most of the use of ARM's core, arm of the cache how?
The ARM processor supports the cache mechanism and separates the cache into I-cache (instruction cache) and D-cache (data cache). As soon as the system is powered on, the contents of the I-cacche are invalid, and the function of the I-cacche is also closed, and the bit[12 of the CP15 Coprocessor's SCTLR register (System control register) controls the opening and closing of the I-cache. When the I-cache is off, the CPU reads the main memory every time the command is taken, so the performance is relatively low. I-cache should therefore be opened as soon as possible. Similarly, when the system just power on, the contents of the D-cache is invalid, and the D-cache function is also closed, SCTLR Register bit[2] control D-cache open and close. Because D-cache must open the MMU (Memory management unit) to enable, and this program is not intended to open the MMU, so here we are not able to d-cache, only study i-cache.
In fact, there are the latest popular rsic-v kernel, but also support the cache, the use of the same method and arm under the same basic, compared to the general system here is not using D-cache.
Testing methods, in fact there are several methods, the simplest one is directly using the while loop, testing the time without the cache to run the case.
Second, the use of special instructions is also OK. For example, some of the system's instructions for doing complex operations are more accurate.
Several concepts of cache under operating system