STM32 PB3 io as normal io

stm32f103 JTAG, the default state is full SWJ.
The default state after reset is "whole pins assigned for a full JTAG-DP connection".

PB3 as JDO, is occupied by Jtag.
In TRACE asynchronous Mode,pb3 or Traceswo.

If the system does not require JTAG, PB3 as a gpio, the following settings are required:

Rcc_apb2periphclockcmd (Rcc_apb2periph_afio | RCC_APB2PERIPH_GPIOB, ENABLE);
Gpio_pinremapconfig (gpio_remap_swj_disable,enable);

The Rcc_apb2periph_afio in the first sentence sets the Afioen (if there is no such sentence, the latter two sentences fail). If a module's clock DISABLE, then the value of the register cannot be read or written.

With the above two sentences, the PB3 can be further operated.
For example:
Gpio_initstructure.gpio_pin = Gpio_pin_3 | Gpio_pin_4 | Gpio_pin_5 | Gpio_pin_6;
Gpio_initstructure.gpio_speed = Gpio_speed_2mhz;
Gpio_initstructure.gpio_mode = gpio_mode_out_pp;
Gpio_init (Gpiob, &gpio_initstructure);


GPIOB->ODR = 0x08;