STM32 timer:auto-reload Register Register

Auto-reload Register (Timx_arr)

The Auto-reload register is preloaded.

Writing to or reading from the auto-reload register accesses the preload register.

The content of the preload register is transferred into the shadow register Permanently

Or at each update event (Uev), depending on the auto-reload preload enable bit (Arpe) in TIMX_CR1 register.

The update event is sent if the counter reaches the overflow (or underflow when downcounting)

And if the Udis bit equals 0 in the TIMX_CR1 register.

It can also is generated by software.

The generation of the update event is described in detailed for each configuration.

arpe:auto-reload preload enable  0  is isn't buffered-- Async load1 is buffered------Sync load

Arpe = 0, Uev = x:arr preload Register--ARR Shadow Register

Arpe = 1, Uev = 1:arr preload Register--ARR Shadow Register

STM32 timer:auto-reload Register Register