(turn) deep understanding of SP, LR, and PC

Website: http://blog.csdn.net/zhou1232006/article/details/6149548

An in-depth understanding of the three registers of arm is of great benefit to both programming and porting of the operating system.

1. Stack pointer R13 (SP): Each anomaly pattern has its own independent R13, which usually points to the stack dedicated to the exception mode, i.e. five exception modes, non-exception modes (user mode and system mode), each with separate stacks, indexed by different stack pointers. When the arm enters the abnormal mode, the program can push the general general register into the stack and return to the stack to ensure the state integrity of the program in various modes.

2, Connection Register R14 (LR): Each mode of R14 has its own version of the group, it has two special functions.

(1) Save the Sub-program return address. When using BL or BLX, the jump instruction automatically puts the return address into the R14; the subroutine returns by copying the R14 to the PC, usually with one of the following instructions:
MOV PC, LR
BX LR

The subroutine is usually written so that the subroutine can also be called.
Stmfd sp!, {LR}
......
Ldmfd sp!, {pc}

(2) When an exception occurs, the R14 of the exception mode is used to hold the exception return address, and the R14 such as the stack can handle nested interrupts.

3, program counter R15 (PC): PC is read and write restrictions. When there is no more than the read limit, the Read value is the address of the instruction plus 8 bytes, because the arm instruction is always word-aligned, so bit[1:0] is always 00. When storing a PC with STR or STM, the offset may be 8 or 12 other values. In V3 and the following versions, the values written to bit[1:0] will be ignored, and bit[1:0 in V4 and later written to R15 must be 00, otherwise the consequences are unpredictable.

(turn) deep understanding of SP, LR, and PC