Uboot under Gpio Drive transplant

Source: Internet
Author: User

Chip: Freescale Mpc8308

Current Uboot version: u-boot-2009.11-rc1.2

Because there is no mpc8308 gpio driver in the current Uboot version, a different uboot version was found, in uboot-2011-12

Find the mpc83xx_gpio.c under/driver/gpio, compare Gpio's register base address with the Gpio address in mpc8308 's manual, indicating that the driver is appropriate


To illustrate, the transplant is not universal, if the other version of the Uboot have related to the definition of the chip also need to check the consistency of the address, if no can imitate the relevant architecture of the chip driver write a


Porting process:

1. File copy

Take mpc8308xx_gpio.c copy to u-boot-2009.11-rc1.2/drivers/gpio/

and modify the Makefile

+cobjs-$ (Config_mpc83xx_gpio) + + MPC83XX_GPIO.O

I put the mpc8308xx_gpio.c in the end

2. Add the relevant header file content to the U-boot-2009.11-rc1.2/include


* * * is free software; Can redistribute it and/or * modify it under the terms of the GNU general public License as * published by the Software Foundation;
 Either version 2 of * The License, or (at your option) any later version. * * This are distributed in the hope that it'll be useful, * but without any WARRANTY;  Without even the implied warranty of * merchantability or FITNESS for A particular purpose.
 The * GNU general public License for more details. * * Should have received a copy of the GNU general public License * along and this program; If not, write to the free Software * Foundation, Inc., Temple Place, Suite, Boston, * MA 02111-1307 USA * * #ifn
 def _mpc83xx_gpio_h_ #define _MPC83XX_GPIO_H_/* * The mcp83xx ' s 1-2 GPIO controllers each with bits. * * #if defined (config_mpc8313) | | Defined (config_mpc8308) | | \ defined (config_mpc8315) #define MPC83XX_GPIO_CTRLRS 1 #elif defined (config_mpc834x) | | Defined (config_mpc837x) #define MPC83XX_GPIO_CTRLRS 2 #else #define MPC83XX_GPIO_CTRLRS 0 #endif #define MAX_NUM_GPIOS (* MPC83XX_GPI
O_ctrlrs) void mpc83xx_gpio_init_f (void);

void Mpc83xx_gpio_init_r (void); #endif/* Mpc83xx_gpio_h_ * *


3. Add GPIO macro Switch

Add in U-boot-2009.11-rc1.2/include/configs/mpc8308edd.h

+/*
+ *add 83xx Gpio
+ */
+ #define Config_mpc83xx_gpio

4. Initialize

Add header files to/LIB_PPC/BOARD.C

#include <gpio.h>

and add the initialization function before Main_loop

Mpc83xx_gpio_init_f ();
Mpc83xx_gpio_init_r ();


Mpc8308xx_gpio.c

* * * Freescale mpc83xx GPIO handling.
 * * The file credits for list of people who contributed to this * project. * * this are free software; Can redistribute it and/or * modify it under the terms of the GNU general public License as * published by the Software Foundation;
 Either version 2 of * The License, or (at your option) any later version. * * This are distributed in the hope that it'll be useful, * but without any WARRANTY;  Without even the implied warranty of * merchantability or FITNESS for A particular purpose.
 The * GNU general public License for more details. * * Should have received a copy of the GNU general public License * along and this program; If not, write to the free Software * Foundation, Inc., Temple Place, Suite, Boston, * MA 02111-1307 USA * * #inc Lude <common.h> #include <mpc83xx.h> #include <asm/gpio.h> #include <asm/io.h> #ifndef config_ Mpc83xx_gpio_0_init_direction #defineConfig_mpc83xx_gpio_0_init_direction 0 #endif #ifndef config_mpc83xx_gpio_1_init_direction #define Config_mpc83xx_ Gpio_1_init_direction 0 #endif #ifndef config_mpc83xx_gpio_0_init_open_drain #define Config_mpc83xx_gpio_0_init_open _drain 0 #endif #ifndef config_mpc83xx_gpio_1_init_open_drain #define Config_mpc83xx_gpio_1_init_open_drain 0 #endif # Ifndef config_mpc83xx_gpio_0_init_value #define Config_mpc83xx_gpio_0_init_value 0 #endif #ifndef Config_mpc83xx_gpio _1_init_value #define CONFIG_MPC83XX_GPIO_1_INIT_VALUE 0 #endif static unsigned int gpio_output_value[mpc83xx_gpio_

CTRLRS];
 * * * Generic_gpio Primitives.

	*/int Gpio_request (unsigned gpio, const char *label) {if (Gpio >=) Max_num_gpios;
return 0;

int Gpio_free (unsigned gpio) {/* do not set to input */return 0;} 
	/* Set GPIO pin ' GPIO ' as an input */int gpio_direction_input (unsigned GPIO) {immap_t *im = (immap_t *) config_sys_immr;
	unsigned int ctrlr;
	unsigned int line;
unsigned int line_mask;
	/* 32-bits per controller * * CTRLR = Gpio >> 5;

	Line = Gpio & (0x1F);

	/* Big endian * * Line_mask = 1 << (31-line);

	Clrbits_be32 (&im->gpio[ctrlr].dir, Line_mask);
return 0; }/* Set GPIO pin ' GPIO ' as ' output, with polarity ' value ' */int gpio_direction_output (unsigned GPIO, int value) {IM
	map_t *im = (immap_t *) config_sys_immr;
	unsigned int ctrlr;
	unsigned int line;

	unsigned int line_mask;
		if (value!= 0 && value!= 1) {printf ("Error:value parameter must be 0 or 1.\n");
	return-1;

	} gpio_set_value (Gpio, value);
	/* 32-bits per controller * * CTRLR = Gpio >> 5;

	Line = Gpio & (0x1F);

	/* Big endian * * Line_mask = 1 << (31-line);

	/* Make the line output */setbits_be32 (&im->gpio[ctrlr].dir, Line_mask);
return 0;
	}/* Read GPIO in value of pin ' GPIO '/int gpio_get_value (unsigned GPIO) {immap_t *im = (immap_t *) config_sys_immr;
	unsigned int ctrlr;
	unsigned int line; unsigned int line_mask;
	/* 32-bits per controller * * CTRLR = Gpio >> 5;

	Line = Gpio & (0x1F);

	/* Big endian * * Line_mask = 1 << (31-line);
/* Read the value and mask off the bit/return (IN_BE32 (&im->gpio[ctrlr].dat) & Line_mask)!= 0; }/* Write GPIO out value to pin ' GPIO '/int gpio_set_value (unsigned GPIO, int value) {immap_t *im = (immap_t *) confi
	G_SYS_IMMR;
	unsigned int ctrlr;
	unsigned int line;

	unsigned int line_mask;
		if (value!= 0 && value!= 1) {printf ("Error:value parameter must be 0 or 1.\n");
	return-1;
	}/* 32-bits per controller * * CTRLR = Gpio >> 5;

	Line = Gpio & (0x1F);

	/* Big endian * * Line_mask = 1 << (31-line);  /* Update The local output buffer soft copy */GPIO_OUTPUT_VALUE[CTRLR] = (GPIO_OUTPUT_VALUE[CTRLR] & ~line_mask) |

	\ (value line_mask:0);

	/* Write the output * * OUT_BE32 (&im->gpio[ctrlr].dat, GPIO_OUTPUT_VALUE[CTRLR]);
return 0; }/* Configure GPIO registers EarlY */void Mpc83xx_gpio_init_f () {immap_t *im = (immap_t *) config_sys_immr;
	#if Mpc83xx_gpio_ctrlrs >= 1 out_be32 (&im->gpio[0].dir, config_mpc83xx_gpio_0_init_direction);
	Out_be32 (&AMP;IM-&GT;GPIO[0].ODR, Config_mpc83xx_gpio_0_init_open_drain);
	Out_be32 (&im->gpio[0].dat, Config_mpc83xx_gpio_0_init_value); Out_be32 (&im->gpio[0].ier, 0xFFFFFFFF);
	* Clear All Events/out_be32 (&AMP;IM-&GT;GPIO[0].IMR, 0);
Out_be32 (&AMP;IM-&GT;GPIO[0].ICR, 0);
	#endif #if Mpc83xx_gpio_ctrlrs >= 2 out_be32 (&im->gpio[1].dir, config_mpc83xx_gpio_1_init_direction);
	Out_be32 (&AMP;IM-&GT;GPIO[1].ODR, Config_mpc83xx_gpio_1_init_open_drain);
	Out_be32 (&im->gpio[1].dat, Config_mpc83xx_gpio_1_init_value); Out_be32 (&im->gpio[1].ier, 0xFFFFFFFF);
	* Clear All Events/out_be32 (&AMP;IM-&GT;GPIO[1].IMR, 0);
Out_be32 (&AMP;IM-&GT;GPIO[1].ICR, 0); #endif}/* Initialize GPIO soft-copies/void Mpc83xx_gpio_init_r () {#if Mpc83xx_gpio_ctrlrs >= 1 gpio_outPut_value[0] = Config_mpc83xx_gpio_0_init_value;
#endif #if Mpc83xx_gpio_ctrlrs >= 2 gpio_output_value[1] = Config_mpc83xx_gpio_1_init_value;
 #endif}




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