In the past few days, I have been busy with the usart experiment of stm32. Although there are many examples on the internet, I have entered the computer completely according to the book routine, but in actual programming, there are always too many errors. Finally, I used simulation to find the final error. I only added a function. For this function, I debugged it for two days. Well, we finally made it.
The following is the test procedure:
/* Includes ------------------------------------------------------------------*/
# Include "stm32f10x_lib.h"
Unsigned int I = 0, j = 0;
// Define the interrupt flag variable
Flagstatus rx_status;
/* Create an array */
Unsigned char txbuf1 [] = "zheng zhou Da Xue \ r \ n ";
Unsigned char txbuf2 [] = "\ r \ n ";
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
Void delay_ms (2010time );
Void rcc_configuration (void );
Void gpio_configuration (void );
Void nvic_configuration (void );
Void usart_configuration (void );
Int main (void)
{
# Ifdef debug
Debug ();
# Endif
/* System clocks configuration uses an external RC crystal oscillator */
Rcc_configuration ();
/* Configure C configuration */
Nvic_configuration ();
/* Configure the gpios */
Gpio_configuration ();
// Turn off all four lights
Gpio_write (gpiob, gpio_pin_8 | gpio_pin_9 );
Gpio_write (gpioe, gpio_pin_0 | gpio_pin_1 );
// Led1 bright
Gpio_resetbits (gpiob, gpio_pin_8 );
// Led2 bright
Gpio_resetbits (gpiob, gpio_pin_9 );
// Led3 bright
Gpio_resetbits (gpioe, gpio_pin_0 );
// Led4 light
Gpio_resetbits (gpioe, gpio_pin_1 );
Delay_ms (100 );
/* Usart configuration */
Usart_configuration ();
// Clear the flag bit. Otherwise, the 1st-bit data will be lost.
Usart_clearflag (usart1, usart_flag_tc );
While (j <10)
{
For (I = 0; txbuf1 [I]! = '\ 0'; I ++)
{
Usart_senddata (usart1, txbuf1 [I]);
// Wait until the data is sent. This sentence is indispensable; otherwise, the message cannot be correctly received.
While (usart_getflagstatus (usart1, usart_flag_tc) = reset );
}
J ++;
}
While (1)
{
If (usart_getflagstatus (usart1, usart_it_rxne) = set)
{
I = usart_receivedata (usart1); // read data from com0
Usart_senddata (usart1, I );
For (j = 0; txbuf2 [J]! = '\ 0'; j ++)
{
Usart_senddata (usart1, txbuf2 [J]);
}
Gpio_resetbits (gpioe, gpio_pin_0 );
Delay_ms (100 );
}
Gpio_setbits (gpioe, gpio_pin_0 );
}
}
/*************************************** ****************************************
* Function name: delay_ms
* Description: delay 1 ms.
* Input: Time (MS)
* Output: None
* Return: None
**************************************** ***************************************/
Void delay_ms (time) // latency Function
{
2010i, J;
For (I = 0; I <time; I ++)
For (j = 0; j <10260; j ++)
;
}
/*************************************** ****************************************
* Function name: rcc_configuration
* Description: configures the different system clocks.
* Input: None
* Output: None
* Return: None
**************************************** ***************************************/
Void rcc_configuration (void)
{
/* Use an internal RC crystal oscillator */
/*******************************
Rcc_hsicmd (enable); // enable the Internal High-Speed crystal oscillator;
Rcc_sysclkconfig (rcc_sysclksource_hsi); // select the Internal High-Speed clock as the system clock sysclock = 8 MHz
Rcc_hclkconfig (rcc_sysclk_div1); // select the hclk clock source as the system clock syysclock
Rcc_pclk1config (rcc_hclk_div4); // The apb1 clock is 2 MB.
Rcc_pclk2config (rcc_hclk_div4); // The apb2 clock is 2 MB.
Rcc_apb2periphclockcmd (rcc_apb2periph_gpiob, enable); // enable the gpiob clock of apb2 peripherals
*********************************/
/* Use an external RC crystal oscillator */
/* RCC system reset (for debug purpose )*/
Rcc_deinit ();
/* Enable HSE */
Rcc_hseconfig (rcc_hse_on );
/* Wait till HSE is ready */
While (rcc_getflagstatus (rcc_flag_hserdy) = reset );
/* Enable prefetch buffer */
Flash_prefetchbuffercmd (flash_prefetchbuffer_enable );
/* Flash 2 wait state */
Flash_setlatency (flash_latency_2 );
/* Hclk = sysclk */
Rcc_hclkconfig (rcc_sysclk_div1 );
/* Pclk2 = hclk */
Rcc_pclk2config (rcc_hclk_div1 );
/* Pclk1 = hclk/2 */
Rcc_pclk1config (rcc_hclk_div2 );
/* Pllclk = 8 MHz * 9 = 72 MHz */
Rcc_pllconfig (rcc_pllsource_hse_div1, rcc_pllmul_9 );
/* Enable PLL */
Rcc_pllcmd (enable );
/* Wait till PLL is ready */
While (rcc_getflagstatus (rcc_flag_pllrdy) = reset );
/* Select PLL as system clock source */
Rcc_sysclkconfig (rcc_sysclksource_pllclk );
/* Wait till PLL is used as system clock source */
While (rcc_getsysclksource ()! = 0x08 );
/* Enable gpiob clocks */
Rcc_apb2periphclockcmd (rcc_apb2periph_gpiob, enable); // enable the gpiob clock of apb2 peripherals
Rcc_apb2periphclockcmd (rcc_apb2periph_gpioe, enable); // enable the apb2 peripheral gpioa clock
Rcc_apb2periphclockcmd (rcc_apb2periph_gpioa, enable); // enable the apb2 peripheral gpioc clock
// Enable usart1
Rcc_apb2periphclockcmd (rcc_apb2periph_usart1, enable); // enable the gpioc clock of apb2 peripherals
}
/*************************************** ****************************************
* Function name: nvic_configuration
* Description: configures the nested Vectored Interrupt Controller.
* Input: None
* Output: None
* Return: None
**************************************** ***************************************/
Void nvic_configuration (void)
{
Nvic_inittypedef nvic_initstructure;
# Ifdef vect_tab_ram
/* Set the vector table base location at 0x20000000 */
Nvic_setvectortable (nvic_vecttab_ram, 0x0 );
# Else/* vect_tab_flash */
/* Set the vector table base location at 0x08000000 */
Nvic_setvectortable (nvic_vecttab_flash, 0x0 );
# Endif
Nvic_prioritygroupconfig (nvic_prioritygroup_2 );
/* Enable the usart1 interrupt */
Nvic_initstructure.nvic_irqchannel = usart?irqchannel; // global interruption of usart1;
Nvic_initstructure.nvic_irqchannelpreemptionpriority = 0;
Nvic_initstructure.nvic_irqchannelsubpriority = 0;
Nvic_initstructure.nvic_irqchannelcmd = Enable;
Nvic_init (& nvic_initstructure );
}
/*************************************** ****************************************
* Function name: gpio_configuration
* Description: configures the different gpio ports.
* Input: None
* Output: None
* Return: None
**************************************** ***************************************/
Void gpio_configuration (void)
{
Gpio_inittypedef gpio_initstructure;
/*
Pb8 port led1
Pb9 port led2
Pe0 port led3
Pe1 port led4
*/
Gpio_initstructure.gpio_pin = gpio_pin_0 | gpio_pin_1; // select pe0 pe1
Gpio_initstructure.gpio_speed = gpio_speed_50mhz; // The Pin frequency is 50 MHz.
Gpio_initstructure.gpio_mode = gpio_mode_out_pp; // The mode is push-pull output.
Gpio_init (gpioe, & gpio_initstructure); // initialize the gpiob register
Gpio_initstructure.gpio_pin = gpio_pin_8 | gpio_pin_9; // select pb8 pb9
Gpio_initstructure.gpio_speed = gpio_speed_50mhz; // The Pin frequency is 50 MHz.
Gpio_initstructure.gpio_mode = gpio_mode_out_pp; // set it to push-pull output.
Gpio_init (gpiob, & gpio_initstructure); // initialize the gpiob register
/* Configure usart1 TX (pa.09) as alternate function push-pull */
Gpio_initstructure.gpio_pin = gpio_pin_9;
Gpio_initstructure.gpio_speed = gpio_speed_50mhz;
Gpio_initstructure.gpio_mode = gpio_mode_af_pp;
Gpio_init (gpioa, & gpio_initstructure );
/* Configure usart1 rx (pa.10) as input floating */
Gpio_initstructure.gpio_pin = gpio_pin_10;
Gpio_initstructure.gpio_mode = gpio_mode_in_floating;
Gpio_init (gpioa, & gpio_initstructure );
}
Void usart_configuration (void)
{
/* Usart1 configuration ------------------------------------------------------*/
/* Usart1 configured as follow:
-Bau drate = 9600 baud
-Word Length = 8 bits
-Two stop bit
-Odd parity
-Hardware Flow Control Disabled (RTS and CTS signals)
-Receive and transmit Enabled
-Usart clock disabled
-Usart cpol: clock is active low
-Usart cpha: data is captured on the second edge
-Usart lastbit: the clock pulse of the last data bit is not output
The sclk pin
*/
Usart_inittypedef usart_initstructure;
Usart_clockinittypedef usart_clockinitstructure;
Usart_initstructure.usart_baudrate = 115200; // set the baud rate of usart transmission;
Usart_initstructure.usart_wordlength = usart_wordlength_8b; // 8-bit data;
Usart_initstructure.usart_stopbits = usart_stopbits_1; // transmit one stop bit at the end of the frame;
Usart_initstructure.usart_parity = usart_parity_no; // parity loss ;;
Usart_initstructure.usart_mode = usart_mode_rx | usart_mode_tx; // enable receiving and sending;
Usart_initstructure.usart_hardwareflowcontrol = usart_hardwareflowcontrol_none; // hardware traffic control failure;
Usart_init (usart1, & usart_initstructure); // initialize the peripheral usart1 register;
Usart_clockinitstructure.usart_clock = usart_clock_disable; // low-level clock activity;
Usart_clockinitstructure.usart_cpol = usart_cpol_low; // The clock is low;
Usart_clockinitstructure.usart_cpha = usart_cpha_2edge; // capture data from the second edge of the clock;
Usart_clockinitstructure.usart_lastbit = usart_lastbit_disable; // The clock pulse of the last bit of data is not output from sclk;
Usart_clockinit (usart1, & usart_clockinitstructure );
Usart_itconfig (usart1, usart_it_rxne, enable); // enable the specified usart1 to receive interruptions;
// Usart_itconfig (usart1, usart_it_txe, enable); // enable the specified usart1 sending interruption;
Usart_cmd (usart1, enable); // enable usart1 peripherals;
}