beaglebone development board

Tutorial: Compile u-boot1.1.4 and above to start the development board based on S3C2410 -- Linux general technology-Linux programming and kernel information, the following is the details to read. Someone has tried to compile U-BOOT 1.1.4 or above to start the S3C2410/SMDK2410 compatible development board? I recently tr

initialization of closing dog and initialization stack, and then use your own Makefile to compile and link the source program to generate a binfile, finally, the file is transmitted to the window and written to nandflash using the u-boot in nor flash in the board. Download the dnw in the window to the board. Restart the board, set the

deniedSolve:Server-side boot must be sudo boot, or start failed, service refused2. Problems occurred:svc:failed to register LOCKDV1 RPC service (errno 111).Lockd_up:makesock failed, error=-111Mount:mounting 192.168.1.101:/home/share on/mnt/hosts Failed:connection refusedThen change to:Mount-t Nfs-o nolock 192.168.1.101:/home/share/mnt/hosts3. Problems occurred:Mount:mounting 192.168.1.101:/home/share on/mnt/hosts failed:device or resource busySolve:This prompt appears after the Mount command on

Recently debugged the serial port above the bottom of the s5pv210 you made. Because writing a program is cumbersome to test a serial port. So, a direct transplant of a minicom onto the development Board. This allows the serial port to send and receive directly. Especially when I need to test multiple serial ports at the same time, faster than writing programs. No more nonsense, look at the operation flow be

Environment Monitoring System Based on zigbee and tiny4412 Development Board, zigbeetiny4412 1. Build the Development Board Environment 　　1. layout of tiny4412 linux Reference blog: http://www.cnblogs.com/luoxiang/p/4186391.html 2. boa Server Construction　　 Download boa Source package: http://www.boa.org/boa-0.94.14rc2

, Amy electronics guessed that Altera cut down the low-end fpga I/O diode clamp protection circuit to reduce costs. Recommended plugging Sequence Cabling Sequence 1. Power off the FPGA Development Board; 2. Connect the JTAG cable of the JTAG simulator to the JTAG interface of the FPGA Development Board; 3. Ins

Altera officially has a de2 Development Board, which has rich resources and complete peripherals. It uses ten-layer circuit board design, and the price is naturally high. I made a piece based on the principle diagram, called diy_de2 Development Board. The

Continue to drive learning based on the progress of the previous article ....... Main references: http://blog.csdn.net/dg1683wen/article/details/6861044 First, build the kernel source code tree. I am using the friendly arm comes with Linux source code: linux-2.6.35.7-20120912.tgz First copy the kernel source code linux-2.6.35.7-20120912.tgz to the Ubuntu system directory/home/liuhui8989/linuxshare Unzip: Tar zxvf linux-2.6.35.7-20120912.tgz to get the linux-2.6.35.7 folder. Start to build the so

One, the following analysis results are reference to the end of 15 development of the CX3 Development Board, the picture is as follows:Second, the UVC Protocol capture tool uses the bus HOUND6.0, the enumeration process data is as follows:Third, the first instruction in the analysis Get_cur, control the transmission mode, the instruction sequence is: A1 81 00 01

The establishment of an NFS development environment involves two aspects: Configuring the NFS server and configuring the client. ---------------- InPCOn-board (NFS server )----------------- 1. Ensure that the NFS service is installed by checking whether NFS files exist in the/etc/rc. d/init. d directory. 2. Edit exports # Gedit/etc/exports Add the following content: /Opt/liuxb2440/