20172333 2018-2019-1 "program design and data structure" Fourth week study summary textbook Learning content summary 6.1 list collection
The list collection has no intrinsic capacity size and grows as needed
List collections can add and remove elements at the middle and end, except that queues and stacks can only be added and deleted at the end.
List collections are divided into three categ
2018-2019-1 20165228 "The foundation of Information security system Design" experimental report on Buffer Overflow Vulnerability Experiment Introduction:Buffer overflow attack: by writing to the program's buffer beyond its length content, causing buffer overflow, thereby destroying the program's stack, causing the program to crash or to make the program to execute other instructions to achieve the purpose o
20172327 2018-2019-1 "program design and data structure" Fourth week study summary textbook study contents summary sixth chapter list
List Collection
1. Linked lists and list comparisons: Linked lists are an implementation strategy that uses references to create links between objects. A list collection is a conceptual representation that lists can be implemented by linked lists an
2018-2019-1 20165316 "Information Security system Design Fundamentals" the second week to summarize the learning contents of the teaching materials
Small end, low address to low, high address to high; You can determine the size and end type of a machine by forcibly extracting a byte of storage from either the cast or union.
A logical operation has only 0 or 12 results, while bit-level operation
2018-2019-1 20165329 summary of the fifth week of Information Security System Design Basics Summary of teaching material learning content 1. Random Access to memory is divided:
Static RAM (SRAM): Each bit is stored in a bistable memory unit, and each unit is implemented by a six transistor circuit.
Dynamic RAM (Dram): each bit of storage is charged for a capacitor.
2018-2019-1 20165325 summary of the fifth week of Information Security System Design 1. Storage Technology Memory can be divided into volatile memory and non-volatile memory,Volatile memoryWhen the computer is shut down or accidentally shut down, the data in the computer will be lost, just like the memory.Non-volatile memoryIn this case, data will not be lost, such as external storage such as hard disk. (1
2018-2019-1 20165306 "Information Security System Design Basics" week 5 study summary teaching material Learning Content summary 6.1 storage technology 6.1.1 random access storage
Static RAM (SRAM): A bi-stable feature that maintains its value as long as it has electricity. Even if there is interference to disturb the voltage, when the interference is eliminated, the circuit will return to the stable valu
-20165206 2018-2019-1 Summary of the fifth week of information security system design-Summary of Teaching Materials-Random Access to memory:
Random Access Memory is divided into two types: static RAM (SRAM) and dynamic RAM (Dram ).
Static RAM stores each bit in a bistability memory unit, and dynamic RAM stores each bit to charge a capacitor.
Static Ram is mainly used in high-speed cache storage; Dynamic
2017-2018-1 20155222 "Fundamentals of Information Security system Design" 10th week IPC mechanism under Linux
The communication mechanism between multiple processes under Linux is called IPC (inter-process Communication), which is a way of communicating with each other across multiple processes. There are several ways of interprocess communication under Linux: Half-duplex pipes, Named pipes, messag
Many friends asked to learn design patterns of books, eldest brother Canglang in the FAQ there is a short narrative, here I extend, said that they have seen or turned over the design patterns of books, due to the level of limitations, there must be a wrong place, I hope you correct, if you see a good pattern related
Directory
Beijing University October 2018 Program Design Competition part of the puzzle (A,C,E,H)
Events related to competitions
Contest Links
Contest topics
Summarize
Beijing University October 2018 Program Design Competition part (A,C,E,H) Contest
correctly judged, so the return is correct.When input and ' 1 ' = ' 2 o'clock, the background executes the SQL statement:select * from The syntax is correct, but the logic is wrong, so it returns correctly.Summarize:This "Introduction to the Fundamentals of SQL injection" experiment with two examples gives me a rough idea of SQL injection and the power of SQL injection. Common techniques for SQL injection include:
Use of non-mainstream channel technology
Avoid input filtering techn
2018-2019-1 20165334 "Fundamentals of Information Security system Design" Third week study summary and Buffer Overflow Vulnerability experiment One, instruction learning gcc -Og -o xxx.c learns to -Og tell the compiler to use an optimization level that generates machine code that conforms to the overall structure of the original C language code. gcc -Og -S xxx.cLearning ( -S option to view compiled code gen
non-gate or non-gate
HCL integer Expression
Case Expression Format:
[ select 1: expr 1 select 2: expr 2 . select k: expr k ]
Set Relationship:iexp in{ iexp1,iexp2,...iexpk }
Arithmetic/logic unit (ALU)
Sequential implementation of Y86-64
Organize the processing into stages
Value fetch--> decoding decode--> performing execute--> memory--> writeback write back write back--> update PC update
SEQ
I. Learning Objectives
Understanding the role of ISA abstraction
Master Isa, and be able to learn other architecture extrapolate
Understanding the pipeline and how it is implemented
Second, the Learning content y86-64 directive
MOVQ directive IRMOVQ rrmovq mrmovq RMMOVQ
Four integer manipulation instructions Addq,subq,andq,xorq only the Register data
7 Jump Instructions Cmovle cmovl cmove cmovne cmovge CMOVG
The call command returns the address to the stack, and then j
1.Y86-64 Instruction Set architecture①Y86-64 directive
MOVQ directive IRMOVQ rrmovq mrmovq RMMOVQ
Four integer manipulation instructions Addq,subq,andq,xorq only the Register data
7 Jump Instructions Cmovle cmovl cmove cmovne cmovge CMOVG
The call command returns the address to the stack, and then jumps to the destination address, and the RET instruction returns from such calls
Pushq and POPQ instructions are implemented into the stack and out of the stack
Execution of Halt
Books explaining database table design solutions have found that the biggest bottleneck for websites is the rationality of database table design. Please recommend books on this topic. Preferably related to mysql ., High-Performance MySQL Performance Tuning and architecture design
enable the compiled executable document to be debugged with GDB
New exploit.c, code below, \x?? \x?? \x?? \x?? Need to add shellcode to the address stored in memory because the location can overwrite the return address just after an overflow occurs.
We want to get shellcode in-memory address, enter commands gdb stack anddisass main
According to strcpy(buffer + 100,shellcode) the statement, we calculate shellcode the address as0xffffd350(十六进制) + 0x64(100的十六进制) = 0xffffd3b4(十六进制)
Mo
1. Machine-Level Code(1) Two kinds of abstract
Defines the format and behavior of machine-level programs by ISA
The memory address used by the machine-level program is the virtual address
2. Data format3. Operand designator4. Press in and eject stack data
Follow the principle of first in and out
Push Press in, pop delete
Pushq press four words into the stack popq four words pop-up stack
5. Arithmetic and logical operations
LEAQ Load Valid address
INC plus a
D
week's exam error summary 1.The following jump commands are related to ZF ()A. jmpB. JeC. jsD. JaE. JBF. JbeAnalytical:2.Assuming that the function of the C-expression T=a+b is completed with the add instruction, the correct statement about the condition Code Register is ()A. If t==0, then zf=1B. If tC. If tD. if (aE. if (aF. LEAQ directive does not affect the condition code registerG. CMP directives do not affect the condition code registerAnalysis: Textbook p135ZF: 0 logo. The result of the r
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