6. After the registration of the adapter and I2C driver for other extensions, it seems that the entire architecture is similar. There are many other extensions. let's take an example of legacy, which is randomly searched in the kernel: In the linux-2.6.26.3/Drivers/hwmon/ad7418.c, the initialization function is: static int _ init ad7418_init (void) {return i2c_add_driver ( ad7418_driver);} The i2c_driver ad7418_driver structure is as follows: static s
Recently, mainly in writing some STM32 on the development program, because the STM32 firmware library, I2C module is not good to use, so in the use of software simulation method to achieve.
The specific code is as follows (debugged under Keil):
#include "stm32f10x_lib.h"//Conditional Compilation 1: Use software to simulate I2C//#define PIN_SCL gpio_pin_6//#define PIN_SDA gpio_pin_7 static __inli ne void tw
The EEPROM is a storage chip for storing small amounts of data. AT24C02 is a kind of EEPROM using the I2C interface.
AT24XXX EEPROM Working principle reference: http://blog.csdn.net/jklinux/article/details/74162876
Dev-interface is the interface to which the I2C controller is invoked by the application. Please refer to If you are not familiar with: http://blog.csdn.net/jklinux/article/details/78676741
Main
I. Summary
Bma220 gravity sensor driver involves three files: bma220.c bma220.h bma220_driver.c. Bma220.c is an API that contains the bma220 driver. bma220.h contains the bma220 Register address, and bma220_driver.c is the I2C device driver of bma220. Here we will analyze and modify the bma220_driver.c.
Ii. bma220_driver.c modification records
--- Bma220_driver.c2012-06-14 19:56:50. 000000000 + 0800 + + bma220_driver_new.c2012-06-17 16:23:46. 850824
About I2C and SPI bus protocols
Iicvs SPI
Currently, in the low-end digital communication application field, we can see IIC (Inter-Integrated Circuit) and SPI (serial peripheral interface) everywhere. The reason is that these two communication protocols are very suitable for close-range and low-speed chip communication. Philips (for IIC) and Motorola (for Spi) have developed these two standard communication protocols for different backgrounds and mark
Based on Linux 2.6.30 Kernel
Conforms to the Linux driver architecture model
The page read and write operations for 24c08 are optimized.
Fully simulates the file read/write mode and supports lseek operations.
This Code contains the device address. When i2c_add_driver is used, it will detect whether there is a device on the address.
However, during board-level development, the i2c_device is placed in the Board file,
I2c_device and i2c_driver match with each other based on the name field.
Repri
stable level. The low level indicates 0 (at this time, the line voltage is the local voltage ), the high level indicates 1 (the voltage is determined by the VDD of the component ). The SDA level can be changed only when the SCL line is low.5. Response Signal ACKThe I2C bus data is transmitted in bytes (8 bits). After each byte is sent, the device releases the data bus during the 9th pulses of the clock, the receiver sends an ACK (which lowers the pow
/EEPROM
Package, burn the firmware to the Development Board, and start the application to view the icon.
Summary:
The entire call process is: app
One problem is that this method changes the android native API. After all, it accesses the hardware. If you want to make a general app and want to use C/C ++ to improve efficiency, you can directly develop the ndk and compile the function into library files into the app project.
Another problem is hardware access permissions. If you do a generic app,
/* Chen 24c01 (1 k) memory I2C bus Experiment C language example single-byte and unsigned long integer read/write program sda scl can be any common I/O */// # Include # Define trytime 250// Number of attempts to perform the operation again when the operation fails// # Define SDA p42// Data line// # Define SCL p43// Clock line# Define i2cwrite 0xa0 // A2 A1 A0 is 0# Define i2cread 0xa1Unsigned char trytime;// Function declarationVoid i2c_write4byte (un
After the frequency of the DDR and arm changes, the I2C problem occurs again:
The previous processing logic is that when the sending buffer is empty, I will read the data in the receiving buffer, the result is determined based on the value of the data counter that reads the receiving buffer first after the interruption. The number of times the receiving FIFO is read is determined based on this value. The previous logic has always been good. This is b
I²C transmits data between devices connected to the bus using only two lines (SDA and SCL). Each device is identified by a unique address (whether it is a microprocessor, LCD driver, memory, or keyboard interface) and can be used as a transmitter or
2. Use JNI to add service access interfaces at the application framework layer
The application cannot directly access the Hal layer. The JNI layer needs to access the Hal module and provide APIs. You can directly provide interfaces, but it is
Write Process
When the MCU performs write operations, it first sends the 7-bit address code of the device and the Write direction "0" (a total of 8 bits, that is, one byte ), after sending the message, the SDA line is released and 9th clock signals
IICVsSPIToday, in low-end digital communications applications, we are seen in IIC (inter-integrated circuit) and SPI (Serial peripheral Interface). The reason is that these two communication protocols are ideal for near- low-speed inter-chip
Data transfer format
(1) byte Transfer and response
Each byte must be an 8-bit length. During data transmission, the highest bit (MSB) is first transmitted. Each transmitted byte must follow one response bit (that is, a frame has nine digits ).
The following is a simple example:Only one host is set on the bus, and the host uses query read/writeMultiple slave machines are allowed on the bus, and the slave machine uses the hardware interruption function.*****************I started to use the
Clock stretching (stretching)Clock stretching pauses a transmission by pulling the SCL line down. The transfer continues until the SCL line is released high. Clock stretching is optional, in fact most slave devices do not include the SCL driver, so
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