sda architects

: SError: {PHYRdyChg CommWake LinkSeq TrStaTrns}Jun 3 20:12:25 lei1 kernel: ata2.00: cmd 25/00: 40: aa: de: e0/00: 00: 61: 00: 00/e0 tag 0 dma 32768 inJun 3 20:12:25 lei1 kernel: res 40/00: 01: 00: 4f: c2/00: 00: 00: 00: 00/00 Emask 0x14 (ATA bus error)Jun 3 20:12:25 lei1 kernel: ata2.00: status: {DRDY}Jun 3 20:12:26 lei1 kernel: ata2: soft resetting linkJun 3 20:12:26 lei1 kernel: ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300)Jun 3 20:12:26 lei1 kernel: ata2.00: configured for UDMA/133J

CommWake LinkSeq TrS TaTrns} Jun 3 20:12:25 lei1 kernel: ata2.00: cmd 25/00: 40: aa: de: e0/00: 00: 61: 00: 00/e0 tag 0 dma 32768 inJun 3 20:12:25 lei1 kernel: res 40/00: 01: 00: 4f: c2/00: 00: 00: 00: 00/00 Emask 0x14 (ATA bus error) Jun 3 20:12:25 lei1 kernel: ata2.00: status: {DRDY} Jun 3 20:12:26 lei1 kernel: ata2: soft resetting linkJun 3 20:12:26 lei1 kernel: ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300) Jun 3 20:12:26 Lei1 kernel: ata2.00: configured for UDMA/133Jun 3 20:12:26 l

Forward the blog about I2C by Mr. Netease DP, which is easy to find during learning.Recently, it was found that the primary device reset may cause an I2C deadlock when accessing the I2C device. The result is high in the SCL and low in the SDA. After that, it is found that the I2C bus is pulled from the device. After the power is down from the device, SDA becomes high and becomes available after power-on T

transmission rate of 10 Kbps. Another advantage of the I2C bus is that it supports multimastering, in which any device capable of sending and receiving can become the master bus. A master can control signal transmission and clock frequency. Of course, there can only be one master at any time point. 2 bus composition and signal type The I2C bus is a serial bus consisting of the SDA data line and the clock SCL, which can send and receive data. Two-w

In Linux, each disk has a device name corresponding to the four ide interfaces of the motherboard. The device names are/dev/hda,/dev/HDB, /dev/HDC,/dev/HDD, etc. If there is an ide raid card, it will be:/dev/HDE,/dev/HDF,/dev/hdg,/dev/hdh. For SCSI hard disks, the device names are/dev/SDA,/dev/SDB,/dev/SDC, and so on. For hard disks with raid, the system regards the entire raid as a physical disk. For example, four GB hard disks have a RAID 5, in the

Fdisk operation of the hard disk and partition, enter FDISK on the hard drive operation phaseWe can partition the hard drive, if you understand the fdisk-l; through fdisk-l, we can find out the number of drives and the name of the device, such as the above example, we will see two devices one is/dev/hda, the other is/DEV/SDA;The command format for Fdisk to manipulate the hard disk is as follows:[[email protected] beinan]# fdisk deviceFor example, we k

Create a device file mknod /app/sda b 8 0 mknod /app/zhongduan1 c 4 1Naming rules Centos5 and beforeIde/dev/hda/dev/hdb.../dev/hdaaSata/sas/scsi/usb/dev/sda/dev/sdb CENTOS6 and after sata/sas/scsi/usb/ide /dev/sda kvm虚拟机的虚拟硬盘 /dev/vda xen虚拟机的虚拟硬盘 /dev/xvda vmware的

:12:25 lei1 kernel: res 40/00: 01: 00: 4f: c2/00: 00: 00: 00: 00/00 Emask 0x14 (ATA bus error)Jun 3 20:12:25 lei1 kernel: ata2.00: status: {DRDY}Jun 3 20:12:26 lei1 kernel: ata2: soft resetting linkJun 3 20:12:26 lei1 kernel: ata2: SATA link up 3.0 Gbps (SStatus 123 SControl 300)Jun 3 20:12:26 lei1 kernel: ata2.00: configured for UDMA/133Jun 3 20:12:26 lei1 kernel: ata2: EH completeJun 3 20:12:26 lei1 kernel: SCSI device sda: 1953525168 512-byte hdwr

Install yum-yinstallhdparm display hard disk settings test hard disk read speed detection IDE hard disk power management mode [root @ cnscn ~] # Hdparm Install Yum-y install hdparm Display hard disk settings Test the read speed of the hard disk Detects the power management mode of an IDE hard disk[Root @ cnscn ~] # Hdparm-C/dev/sda/Dev/sda:Drive state is: standby [power-saving mode]Display the specified hardware specification of the IDE hard dis

Overview:I²C is the abbreviation for inter-integrated Circuit, pronounced as "eye-squared cee" or "Eye-two-cee", which is a two-wire interface.I²C uses only two bidirectional lines, one Serial Data line (SDA) and the other Serial Clock (SCL).SCL: The rising edge enters data into each EEPROM device, and the falling edge drives the EEPROM device output data. (Edge Trigger)SDA: Bidirectional data line, for OD

"; SqlConnection myconn = new SqlConnection (constring); SqlCommand mycmd = new SqlCommand (SQL1, myconn); SqlDataAdapter SDA = new SqlDataAdapter (myCMD); DataSet ds = new DataSet (); Sda. Fill (ds, "Contact"); This. Gridview1.datasource = ds. tables["Contact"]; This. Gridview1.databind (); MyConn. Close (); } protected void button1_click (object sender,

Fdisk operation of the hard disk and partition, enter FDISK on the hard drive operation phaseWe can partition the hard drive, if you understand the fdisk-l; through fdisk-l, we can find out the number of drives and the name of the device, such as the above example, we will see two devices one is/dev/hda, the other is/DEV/SDA;The command format for Fdisk to manipulate the hard disk is as follows:[[email protected] beinan]# fdisk deviceFor example, we k

=f159-ea55/boot/efi vfat umask=0077,shortname=winnt 0 0/dev/mapper/cl-data/data XFS Defaults,noatime,nobarrier 1 2/dev/mapper/cl-swap Swap Defaults 0 0 After modifying the method above, reboot the host and discover that all mount points are normal. Second, use Udev to adjust the disk order One day the database side of the brother asked Sdb, SDC, SDE multiple disk names increase after the problem of chaos. Later on their own virtual machine and try to use Udev to solve the problem, re

The last 2 weeks have been debugging IIC and SPI bus equipment, here record 2 kinds of bus, in case of forgetting. One IIC Bus The abbreviation of I2c--inter-ic serial Bus is the serial transmission bus between chips introduced by Philips company. It implements duplex synchronous data transfer with 1 serial data cables (SDA) and 1 serial clock lines (SCL). The utility model has the advantages of less interface line, simpler control mode, smaller devic

What kind of framework is required for enterprise-level software development? Guide 1.Enterprise software development process 2. What is the framework and why the framework should be developed? Enterprise software development process 1) Domain Modeling Analyze domain-specific issues. For example, she is positioned to address the needs of urban residents who seek housing rental, second-hand houses, second-hand cars, second-hand goods transactions, job hunting, and other life informa

Martin Fowler classic. 3. enterprise integration patterns: designing, building, and deploying messaging solutions-enterprise integration mode: design, build, and deploy message delivery solutions Enterprise Application Communication integration, which is required by architects in SOA/ESB. 4. Executive Enterprise Java-Chinese Version expert one-on-one J2EE design and development-J2EE design and development programming guide Newar

Abstract:Microsoft Visual Studio 2005 team edition is a graphical design tool suite provided with Visual Studio 2005, mainly for architects and developers. It supports visual design and verification of the Connection System. Visual Studio 2005 team edition for Software Distributed ts is an early product of the Dynamic System Management Plan (DSI), designed to improve the design, deployment, and management of enterprise-level distributed systems. Not

views on some of the architects ' controversial themes 　　My understanding of the architecture definitionAbout 7-8 years ago, I used to have an American counterpart architect, mentor, who told me that architecture was actually discovering stakeholders (stakeholder) and then addressing their concerns (concerns), and then I read a book Software system Architecture: Working with stakeholders using viewpoints and perspectives, the idea is that the go

aspects to explore the problem of design safety misunderstanding.Myth One: Compatibility designThe better-compatible architecture adapts to the needs of future changes, so architects will be very concerned about the architecture's compatibility design, but some compatibility designs can lead to serious security breaches that cannot even be fixed with a simple patch of vulnerability.Use Apple's USB-C interface design as a case study. The USB-C interfa

that they have the ability to take a good judgment of this responsibility. Because software architects have a variety of responsibilities, you need to get a deeper understanding of their engagement, influence, leadership, and sense of responsibility in different areas. In general, in most projects the software architecture can be divided into two phases, the definition of architecture, and then its delivery.Definition of software ArchitectureThe sche