' Make ' and ' makefile ' in Linux

Before referring to ' make ' and ' makefile ', it is necessary to clarify the process of compiling the program, under the Windows operating system, we generally use the program software has vs, VC, and so on, these are integrated software, when the program is written, directly click to compile and link, So how does the compiler compile the program?

Compilation process

(1) pretreatment stage

After the program is edited, before compiling, the compiler will pre-process the program, the preprocessing phase of the general work is to remove the program's comments, the header file in the source file to expand, and macro substitution, and so on, after processing will generate a. i file.

(2) Compile stage

Converts the compiled source program to assembly code and generates a. s file.

(3) Assembly stage

The assembly file. S is converted to a binary file that the computer can recognize. o file.

(4) Link stage

Links the other. o Files and binaries to a piece, forming the binary. exe.

The compilation environment above Windows is integrated, the programmer can not be too much in the process of program execution, but in the Liunx system Editor, compiler, debugger are separated, I use the editor is vim, the compiler is GCC, debugger for GDB, Need to clarify the difference between make and makefile (or makefile)?

Make and Makefile are two completely different things, makeis an instruction , be able to compile the program, and makefile is a file , you can generally use the GCC instructions to build a lot of target files, Makefile files are compiled instructions, when the makefile file is written, only need to use the make command to complete the compilation process, the following is a simple program to describe the Linux program execution process:

Writing MAIN.C files

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Writing test.c files

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Writing test.h files

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Obviously, if you want to implement the Main.c file can not be separated from the three files, then what is the relationship between the three files? To execute a program, you need to have MAIN.O, TEST.O files, and TEST.O and MAIN.O files need to have Test.s and main.s files, while main.s and Test.s files depend on main.i and test.i files, and these two files depend on main.c and test.c files, and the files generated during compilation There is this dependency, that is, the inverse process of compilation, following a simple diagram:

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The following is a shortened makefile file:

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According to the above makefile file, a simple introduction to the Makefile File execution process, makefile file is executed sequentially, the execution process will follow the instructions to generate the corresponding target file, clean is the name of an action, when the input make to compile, The clean content will not be executed, and if you enter the command to make the clean, then simply skip to the clean location to execute clean and delete the target file that was generated at the time of the compilation, following the procedure that the program executes:

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Note:

(1) If you do not want to mutate the process, the compiler will execute the output, you can be in the makefile file before the compilation instructions to add the @ character, that is @gcc-C test.c , so that the execution of the instructions will be hidden.

(2) The annotation symbol used in makefile is ' # '.

(3) Clean is just the name of an action, it is not dependent on the relationship, so clean behind only ': ', no other files and other things.

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' Make ' and ' makefile ' in Linux