1. Basic Knowledge

Microcomputer principle and interface: physical structure and programming structure of PC and CPU
Composition principle: research on the structure, function and performance of computers
Assembly Language: an effective and flexible control system using the programming structure and Instruction Set of the hardware system


Assembly Language (enable)
Just like the user experience mentioned by the product manager, we set assembler as a user. What should we do if the machine instruction is too long? Create a mnemonic and convert it to a machine code based on the mnemonic code when the code is submitted. This solution has two tasks to do. 1 is to set the relationship between the machine code and the mnemonic code in advance, 2 is to provide API... as a cross-era solution, the ing between mnemonic and machine code does not need to be completed by programmers (cool, but in other words, do not think about What you define ), in addition, I feel that if all the supporting notes are the same, the legendary cross-platform is complete. I am very excited to think about it. Unfortunately, the features provided by the hardware (machine code) are not so unified, all in all, we can think that a set of CPUs has a set of different Enis, but simple functions have been followed (it looks like the xxx specification, but it is not found). This is the cross-platform introduction, as long as a language is packaged, he can differentiate the CPU at the underlying layer, and then convert his syntax into the CPU-related Assembly and convert it into a machine code ....
In short, the assembly language is formed like this. He has three commands.
(1) Assembly command: machine code mnemonic, corresponding to machine code
(2). pseudocommands: executed by the compiler (understanding) without the corresponding machine code
(3). Other symbols: + -*/

Memory and registers
With the help letter, I can write and implement it. When it comes to implementation, as a Z on the Bi end, my first question is where the data comes from, whether the model is supported (the data required to implement the function is not required by the database Regan). By the way, the Bi client has very low permissions, for example, you cannot use a configuration file (architecture group management, architecture group does not provide bi-side configuration files) or create a data table (model group management, models do not support solutions )... assume that you must use the configuration file. You need to create a new requirement, create the UI, and then write the configuration to the database...

Memory is a memory device in a computer system used to store programs and data, such as hard disks and memory.

Just like our project, data can also come from resource files in the database, but just like we cannot access resource files, CPU cannot access hard disks, and we can only access the database, the CPU needs to access the data, the data we get must be put into the model (bean), and the cup operation data must also be put into the register (although the reasons are different, it does not matter, but I just want to tell you)

Storage Unit: storage unit = byte

CPU read/write to memory
Just as the CPU only recognizes 0/1 and accesses the memory to do two things, read/write, and read operations need to know the storage unit and read data, write requires that you know what data to use. Hopefully, the transmission must be supported by hardware. Just like the encapsulated method, you don't have to worry about how to call it internally, there are three variables.
Address of the storage unit (address information)
Read or write data (data information)
Read/write naming (Control Information) 32
The size of the address bus, that is, the manageable range of the CPU. For example, the 32-bit address information, its address information "type" (type in the database) is 32-bit, and its bit information is 0/1, the range he can represent is 32 full-hitting binary + 1, that is, 2 to the power of 32.
The size of the data bus, that is, the size of one transmission capacity (too small to pass multiple times, too large to pass 0 at a high level, or the control bus will not read the high level at all)
The size of the control bus, that is, the size of the processing capacity. One control bus only provides read/fetch, which is obviously not mentioned. However, if some fixed logic is encapsulated, the number of data transfers can be greatly reduced.
In conclusion, the memory size disposable to the CPU is related to the address bus, and the size of one transmission is related to the data bus. The specific number of transmission times is related to the control bus... (The wooden and sensory control bus is related to machine code/Mnemonic)

Memory Address Space
The CPU needs to access the memory (data) through the unique ID of the address. What if the memory is divided into multiple blocks? I don't know how to handle it. It seems that Uncle IBM again encapsulates him into hardware, so we can only use a unified memory model, the address may not be the same as the address on the memory stick, but it is absolutely unique. As for its specific range relationship .. who cares.

1. Basic Knowledge