10. deep understanding of computer system notes: Memory Hierarchy, high-speed cache memory (2)

1. set associative Cache)

1 <e <C/B

2. fully associative Cache)

E = C/B

Because fully-connected high-speed cache requires parallel searches for many matched rows, it is relatively difficult to construct. Therefore, it is only suitable for small high-speed caches, such as TLB in a virtual memory system, it caches page table items.

3. Write back: the storage update should be postponed as much as possible.AlgorithmThe updated block is written back to the memory only when it is evicted.

Processing Miss: Write-allocate is used to load the corresponding memory block to the cache and update the cache.

We recommend that you use the cache for write-back and write allocation.

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