10010 three-stage state machine Implementation of sequence Detector)

Sequence detector is a classic tutorial in the design of time series digital circuits. This example is provided in Xia Yuwen's "tutorial on the Design of Digital System in OpenGL". It is used to design a sequence detector of "10010" in OpenGL. After reading this, I think the F and G statuses are redundant, and I just learned how to write a three-stage state machine, so I changed thisProgram,CodeAs follows:

 Module Seqdet (nrst, CLK, x, z );
 Input Nrst, CLK;
 Input X;
 Output Z;
 Reg Z;

 Reg [ 4 : 0 ] CS, ns;
Parameter [ 4 : 0 ]
Idle = 5  '  B00000,  
 A = 5  '  B00001,  
 B = 5  '  B00010,  
 C = 5  '  B00100,  
 D = 5  '  B01000,  
 E = 5  '  B10000;  
                  
 Always @( Posedge CLK Or  Negedge Nrst)
 Begin 
 If (! Nrst)
CS <= idle;
 Else 
CS <= ns;
 End 

 Always @ (Nrst Or CS Or X)
 Begin 
NS = 5 '  BX;  
                       Case (CS)
Idle: Begin  
 If (X = 1 ) NS =; Else NS = idle; End 
A: Begin 
 If (X = 0 ) NS = B; Else NS =; End 
B: Begin 
 If (X = 0 ) NS = C; Else NS =; End 
C: Begin 
 If (X = 1 ) NS = D; Else NS = idle; End 
D:Begin 
 If (X = 0 ) NS = E; Else NS =; End 
E: Begin 
 If (X = 0 ) NS = C; Else NS =; End 
 Default :
NS = idle;
Endcase 
 End 

 Always @( Posedge CLK Or   Negedge Nrst)
 Begin 
 If (! Nrst) z <= 1  '  B0;  
                           Else   Begin 
Z <= 1  '  B0;  
                               Case (NS)
Idle, A, B, C, D: z <= 0 ;
E: z <= 1 ;
 Default : Z <= 0 ;
 Endcase   End 
End 
 Endmodule 

Testbench was not written during simulation, and functional simulation was directly performed using the simulation tool in Quartus II 8.1. The waveform is as follows:

The test results show that the three-stage state machine is successfully modified.