20, LCD touch screen

First, LCD color LCD Screen Working principle

1, STM32 and touch screen connection method

PD7-LCD-CS:LCD chip selection signal.
PE1-LCD-RST:LCD Reset Signal.
Pd5-nwe: Write enable, connect the LCD's rw foot.
Pd4-noe: Outputs the RD PIN that enables the LCD to be connected.
PD11-A16-RS: Command/Data flag
(0, read and write commands; 1, read and write data).
D[15:0]:16-bit bidirectional data cable.
PD13-LIGHT-PWM:LCD backlight control.

2, touch screen color settings

24-bit to 16-bit format formula:

#define RGB565 (R, G, b) (R >> 3) << 11 | (g >> 2) << 5 | (b >> 3))

3. ILI9320 Common Commands

(R0), this command, has two functions, if write to it, then the lowest bit is OSC, used to turn the oscillator on or off. If you read to it, the controller's model number is returned.

(R32, R33), set the row and column addresses of the gram. R32 is used to set the column address (x-coordinate, 0~239), R33 to set the line address (y-coordinate, 0~319). When we want to write a color at a specified point, we set it to that point by the two commands and then write the color value.

(r80~r83), Row and column gram address location settings. These commands are used to set the size of your display area, our entire screen size is 240*320, but sometimes we just need to write the data in some of these areas, if the first write the coordinates, and then write the data in such a way to achieve, then the speed is greatly discounted. At this point we can through these several commands, in which a region, and then continue to lose data, the address counter will automatically increase/decrease according to the settings of R3, so that there is no need to write the address frequently, greatly improving the speed of the refresh.

(R34), write the data to the Gram command, when the command is written, the address counter will automatically increase and decrease. This command is the only single action command in this set of commands that we want to introduce, just write the value, and the other is to write the command number first and then write the operand.

R3, Import Mode command. Our focus is on the 3 bits of i/d0, I/D1, AM, because these 3 bits control the display direction of the screen. AM: Controls gram update direction. When am=0, the address is updated in line direction. When Am=1, the address is updated in column orientation. I/D[1:0]: When a data is updated, the address counter automatically increases/decreases by 1 based on the settings of these two bits.

R7, displays the control command. The command CL bit is used to control whether it is 8 or 16 bits in color. When Cl=1 is a 8-bit color, 16-bit color when cl=0. D1, D0, basee these 3 bits are used to control the display status of the screen. When all set to 1 o'clock display on, all set to 0 o'clock show off. We generally use this command to set the LCD display state at idle time to reduce power consumption.

4. Touch screen Operation procedure

TFTLCD display the required setup steps as follows:

1) Set the IO STM32 connected to the TFTLCD module. This step, we first initialize the IO port connected to the TFTLCD module to drive the LCD.

2) Initialize the TFTLCD module. Start the display of the TFTLCD by writing a series of settings to TFTLCD. Prepares for subsequent display of characters and numbers.

3) The characters and numbers are displayed on the TFTLCD module by function. Here is the program that we designed to send the characters that will be displayed to the TFTLCD module.

Second, STM32 FSMC working principle (FSMC full name "Static memory controller")

1, FSMC function Introduction

Convert the AHB transmission signal to the appropriate external device protocol
Meet timing requirements for accessing external devices
All external memory shares the address, data, and control signals of the controller output, and each external device can be distinguished by a unique chip selection signal. FSMC only access one external device at any one time.
Devices with a static memory interface include:
-Static random memory (SRAM)
-Read-only memory (ROM)
─nor Flash
─psram (4 memory blocks)
Two NAND flash blocks.
16-bit PC Card compatible device

8 or 16-bit data bus
Separate chip selection control for each memory block
Each memory block can be configured independently
Timing can be programmed to support a variety of different devices:
-Waiting period programmable (up to 15 cycles)
-Bus recovery cycle programmable (up to 15 cycles)
-Output enable and write enable delay programmable (up to 15 cycles)
-Independent read-write timing and protocol to support wide range of memory and timing
Write enable and byte selection outputs for use with Psram and SRAM devices
Converts a 32-bit AHB access request to a continuous 16-bit or 8-bit, access to an external 16-bit or 8-bit device

2.

3. FSMC Block Diagram

The FSMC consists of the following four modules:

(1) AHB interface (includes FSMC configuration register)

(2) NOR Flash and PSRAM controllers

(3) NAND Flash and PC card controller

(4) External device interface

It is important to note that FSMC can request the operation of AHB for data width. If the data width of the AHB operation is greater than the width of the external device (NOR or NAND or LCD), the FSMC splits the AHB operation into several contiguous, smaller data widths to accommodate the data width of the external device.

4. FSMC the address image of the external device

From the FSMC point of view, the external memory can be divided into a fixed size of 256M bytes of four storage blocks, see.
Storage block 1 is used to access up to 4 nor flash or psram storage devices. The 4 Nor/psram districts have 4 dedicated pieces selected.
Storage blocks 2 and 3 are used to access NAND flash devices, each of which connects to a NAND flash memory.
Storage Block 4 is used to access a PC Card device the type of memory on each storage block is defined by the user in the configuration register.

5. Nor and Psram address image

As can be seen, FSMC to the external device address image starting from 0x6000 0000, to 0X9FFF FFFF end, a total of 4 address blocks, each address block 256M bytes. As you can see, each
Address Block is divided into 4 sub-address block, size 64M. For NOR's address image, we can select haddr[27:26] to determine which 64M sub-address block is currently in use, such as the next page table.
And these four pieces of storage block of the chip selection, then use Ne[4:1] to select. The data Line/Address line/control line is shared.

Ne1-ne4, the corresponding pin is: pd7-ne1,pg9-ne2,pg10-ne3,pg12-ne4

6. Correspondence between HADDR and Fsmc_a

HADDR is an internal AHB address line that needs to be converted to external memory.
HADDR[25:0] contains the external memory address. Haddr is a byte address, and memory access is not all accessed by byte, so the address line to the memory varies according to the data width of the memory, as in the following table:

For 16-bit-width external memory, the FSMC will internally use Haddr[25:1] to generate the address of the external memory fsmc_a[24:0]. Regardless of the width of the external memory (16-bit or 8-bit),

Fsmc_a[0] should always be connected to the address line of the external memory a[0].

7, STM32 and touch screen connection method

PD7-LCD-CS:LCD chip selection signal.
PE1-LCD-RST:LCD Reset Signal.
Pd5-nwe: Write enable, connect the LCD's rw foot.
Pd4-noe: Outputs the RD PIN that enables the LCD to be connected.
PD11-A16-RS: Command/Data flag
(0, read and write commands; 1, read and write data).
D[15:0]:16-bit bidirectional data cable.
PD13-LIGHT-PWM:LCD backlight control.

8, the use of TFTLCD as a SRAM equipment

Here we introduce why we can use TFTLCD as a SRAM device: First we understand the connection of the external SRAM.     External SRAM control generally include: address lines (such as A0-A18), data lines (such as d0-d15), write Signal (WE), read signal (OE), Chip selection signal (CS), if the SRAM supports byte control, then there are ub/lb signals. TFTLCD signals include: RS, D0-D15, WR, RD, CS, RST, and BL, which are the only things that need to be used when operating the LCD: RS, d0-d15, WR, RD and CS. Its operation timing and SRAM control is exactly the same, the only difference is that the TFTLCD has an RS signal, but no address signal.

TFTLCD through the RS signal to determine whether the transmitted data is data or command, in essence, can be understood as an address signal, such as we put RS on the A0 above, then when the FSMC controller write address 0, will make A0 into 0, for TFTLCD, is to write commands. and FSMC write address 1, A0 will become 1, for TFTLCD, is to write data. In this way, the data and commands are separated, and they are actually two consecutive addresses that correspond to the SRAM operation. Of course, RS can also be connected to other address lines, we think the technology of the Ly-stm32 Development Board is the RS connected to the A16 above.

Three, light LCD color LCD screen

1, light LCD color LCD screen steps

(1). Turn on the FSMC peripheral clock

(2). Configuring Gpio Pin status for FSMC

(3). FSMC initialization Configuration

(4). Call the LCD color LCD screen initialization function

(5). Write the LCD color LCD screen reading and writing function (Command/data)

(6). Send data to the LCD color LCD screen in the cache and display

2. ILI9320 Common Commands

3. Code Routines:

4. Project Download:

Four, LCD color LCD screen display Chinese characters, English, digital

1. Code Routines:

2. Project Download:

Five, touch screen working principle

1. Touch screen Structure

2. Function description

The XPT2046 is a 4-wire resistive touch-screen controller with a 12-bit resolution 125KHZ conversion rate step-up approximation of A/D converter. The XPT2046 supports low-voltage I/O interfaces from 1.5V to 5.25V. XPT2046 can detect the pressed screen position by performing a two A/D conversion, and can measure the pressure added to the touchscreen. The internal 2.5V reference voltage can be used as auxiliary input, temperature measurement and battery monitoring, and the battery can be monitored from 0 v to 6 v. A temperature sensor is integrated in the XPT2046 chip. Under typical operating conditions of the 2.7V, the reference voltage is switched off and the power dissipation is less than 0.75mW. The XPT2046 is in a tiny package: tssop-16,qfn-16 and VFBGA-48. The operating temperature range is -40℃~+85℃. Fully compatible with ADS7846, TSC2046, ak4182a

3. Main Features

Operating voltage range of 1.5v~5.25v

Digital I/O ports with 1.5v~5.25v support

Built-in 2.5V reference voltage source

Power supply voltage Measurement (0v~6v)

Built-in junction temperature measurement function

Touch Pressure Measurement

Using 3-wire SPI Communication interface

With automatic power saving function

4. chip package and PIN definition

5. Digital Interface

The XPT2046 data interface is a serial interface with a typical operating sequence of 12, and the signal shown in the figure is from a microcontroller or data signal processor with a basic serial interface. The communication between the processor and the converter requires 8 clock cycles, and the SPI synchronous serial interface can be used. A complete conversion requires 24 serial synchronization clocks (DCLK) to complete. The first 8 clocks are used to enter the control byte via the din pin. When the converter obtains enough information about the next conversion, it enters the sampling mode. After 3 multi-clock cycles, the control byte setting is complete and the converter enters the conversion state. The next 12 clock cycles will complete a true analog-to-digital conversion, and the 13th clock will output the last of the conversion results. The remaining 3 multi-clock cycles will be used to complete the last byte ignored by the converter (Dout low).

Control byte controlled by DIN input as shown in table 5, it is used to initiate conversion, addressing, setting ADC resolution, configuration and power-down control of the XPT2046. Table 6 gives a detailed description of each control bit of the control word.

The starting bit-the first bit, that is, the s bit. The first word of control must be 1, or S=1. All inputs are ignored until the start bit is detected by the XPT2046 din pin.

Address-The next 3 bits (A2, A1, and A0) Select the current channel for the multiplexer, the touch screen driver, and the reference source input.

mode--mode Select bit to set the resolution of the ADC. Mode=0, the next conversion will be a 12-bit mode; mode=1, the next conversion will be 8-bit mode.

ser/dfr--bit Control Reference source mode, select Single-ended mode (ser/dfr=1), or differential mode (ser/dfr=0). In x-coordinate, y-coordinate, and touch-pressure measurements, the differential mode of operation is preferred for optimal performance. The reference voltage comes from the voltage of the switching driver. In single-ended mode, the reference voltage of the converter is fixed to the voltage of vref relative to the GND pin.

The internal reference voltages of the PD0 and PD1--ADC can be closed or turned on individually, but before conversion, additional time is required to stabilize the internal reference voltage to the final stable value, and to ensure sufficient wake-up time if the internal reference source is in a power-down state. The ADC requires instant use and no wake-up time. It is also important to note that when the busy is high, the internal reference source is not allowed to enter the power-down mode. If you want to turn off the reference source after the XPT2046 channel has changed, write the command again to XPT2046.

6, touch screen structure

7. Digital Interface

The XPT2046 data interface is a serial interface with a typical operating sequence of 12, and the signal shown in the figure is from a microcontroller or data signal processor with a basic serial interface. The communication between the processor and the converter requires 8 clock cycles, and the SPI synchronous serial interface can be used. A complete conversion requires 24 serial synchronization clocks (DCLK) to complete.

The first 8 clocks are used to enter the control byte via the din pin. When the converter obtains enough information about the next conversion, it enters the sampling mode. After 3 multi-clock cycles, the control byte setting is complete and the converter enters the conversion state. The next 12 clock cycles will complete a true analog-to-digital conversion, and the 13th clock will output the last of the conversion results. The remaining 3 multi-clock cycles will be used to complete the last byte ignored by the converter (Dout low).

Control byte controlled by DIN input as shown in table 5, it is used to initiate conversion, addressing, setting ADC resolution, configuration and power-down control of the XPT2046. Table 6 gives a detailed description of each control bit of the control word.

The starting bit-the first bit, that is, the s bit. The first word of control must be 1, or S=1. All inputs are ignored until the start bit is detected by the XPT2046 din pin.

Address-The next 3 bits (A2, A1, and A0) Select the current channel for the multiplexer, the touch screen driver, and the reference source input.

mode--mode Select bit to set the resolution of the ADC. Mode=0, the next conversion will be a 12-bit mode; mode=1, the next conversion will be 8-bit mode.

ser/dfr--bit Control Reference source mode, select Single-ended mode (ser/dfr=1), or differential mode (ser/dfr=0). In x-coordinate, y-coordinate, and touch-pressure measurements, the differential mode of operation is preferred for optimal performance. The reference voltage comes from the voltage of the switching driver. In single-ended mode, the reference voltage of the converter is fixed to the voltage of vref relative to the GND pin.

The internal reference voltages of the PD0 and PD1--ADC can be closed or turned on individually, but before conversion, additional time is required to stabilize the internal reference voltage to the final stable value, and to ensure sufficient wake-up time if the internal reference source is in a power-down state. The ADC requires instant use and no wake-up time. It is also important to note that when the busy is high, the internal reference source is not allowed to enter the power-down mode. If you want to turn off the reference source after the XPT2046 channel has changed, write the command again to XPT2046.

8. Code Routines:

9. Project Download:

20, LCD touch screen