2016 first half software designer morning real problem
1. VLIW is the abbreviation for ().
A Complex instruction system computer B. Large scale integrated circuit
C Single instruction stream multiple data stream D. Extra Long Instruction Word
2. Main memory and the cache address mapping mode, () mode can be implemented any block of main memory into the cache anywhere, only fill the need to replace.
A. Full-phase B. Direct mapping C. Group-linked D. Series-Parallel
3. If the "2X" complement is "90H", then the truth of X is ()
A B. -56 C. D. 1 1 1
4. The operation result of the () instruction in the shift instruction is equivalent to multiplying the operand by 2.
A Arithmetic left shift B: Logical right Shift C. Arithmetic right shift D. Left shift with carry loop
5. Memory is byte-addressable, and the storage capacity of the zone from a1000h to B13ffh is () KB.
A B. C. D. 67
6. The following description of the bus is incorrect ()
A The parallel bus is suitable for high-speed data transmission.
B Serial bus for long-distance data transmission
C Single bus architecture adapts to different types of devices on one bus, simple design and high performance
D. The dedicated bus can be designed to best match the connected device
7. The following is a description of the network hierarchy and the main device correspondence, pairing is correct ()
A Network Layer-Hub B. Data Link layer--bridge
C Transport Layer--router D. Session Layer--firewall
8. The protocol used to transmit SSL-encrypted web pages is ()
A.http B. HTTPS C. S-http D. http-s
9. In order to attack remote hosts, it is common to use () technology to detect remote host status.
A. Virus killing B. Port Scan c.qq chat D. Identity authentication
2016-05-i