2018-2019-1 20165228 "Information Security system Design Fundamentals" Fourth week study summary textbook Learning content Summary y86-64 instruction set architecture
Each instruction in the Y86 program reads or modifies portions of the processor state
Programmer Visible State
- 15 Program Registers (RF): Each register stores a 64-bit, 8-byte word (that is, the y86-64 instruction length)
- 3 Condition codes (CC): ZF (0 flag bit)/SF (symbol sign bit)/of (overflow flag bit)
Program Status (STAT)
- Program Counter (PC): Stores the address of the currently executing instruction and computes the address of the next instruction, based on the encoding length of the current instruction.
Memory (DMEM): A large array of bytes used to hold programs and data.
Y86-64 directive- Y86-64 Program Register Identifier:
- Register identifier range: 0-0xe
- Storage of Program registers: Register file
- No registers should be accessed: represented by 0xF
- Y86-64 instruction Encoding
- Encoding Length: 1 bytes ~ byte
- Composition: 1, a single-byte instruction designator
2, a single-byte register indicator
3, a eight-byte constant number
- The instructions explain in detail:
- Halt directive: Hexadecimal representation is 00, which takes up one byte. When executed, causes the processor to stop.
- NOP directive: Hexadecimal representation is 10, which takes up one byte.
- RRMOVQ RA,RB directive: hexadecimal is represented as two bytes, which is a rArB.
...
function code for the y86-64 instruction set: The high four bits are the code part, and the lower four bits are the functional ones.
Logic design and hardware control Language HCL
- Three important components are required to achieve a digital system:
- Combinatorial logic for calculating functions that operate on bits
- Storage unit for storage bits
- Control the clock signal for storage unit updates
- The difference between HCL and HDL
- HCL: Hardware Control Language
- HDL: Hardware Description Language
- Operators in HCL Expressions: both operate on a single word
- With: And with "&&" means
- Or: or with "| |" Said
- Non: not used "! "represents
- And, or, not three kinds of logic gates can be implemented with a non-gate or non-gate
- Combinational Circuit: Multiple logic gates are combined into a net (must have no ring) to form a computational block, called a combinational circuit.
- Limitations When multiple logic gates are combined: each logic gate input must be connected to one of the following options, and the outputs of two or more logic gates cannot be connected together.
1. One system input
2, the output of a memory unit
3. Output of a certain logic gate
- HCL integer Expression
Condition expression:
Arithmetic/logic unit (ALU): Plus, minus, with, XOR, or
- Set Relationship:
IEXPR is the value being tested, and IEXPR1~IEXPRK is a positive expression with a matching value.
iexpr in { iexpr1,iexpr2,...,iexprk }
- Memory and Clock
Devices that store information by bit
- Clock Register: A register for short, storing a single bit or word. Y86-64 is used in the Register Saver counter PC, Condition code CC and program status stat
- Random Access registers: short memory, storing multiple words.
- Register
- Hardware register: Connect its input and output lines to other parts of the circuit. The rising edge of the clock will load the new input signal and output, which is the barrier between the combinational logic in the circuit's non-pass part.
- Program registers: The few addressable words in the CPU, where the address is the register ID, which usually exists in the register file.
- Register composition: Two read ports, one write port, clock
Sequential implementation of Y86-64
2018-2019-1 20165228 "Information Security system Design Fundamentals" Fourth Week study summary
