2018-2019-1 20165304 "Information Security system Design Fundamentals" Fourth Week study summary

Summary of learning contents of textbook

Programmer-Visible state: Each instruction in the Y86-64 program reads or modifies portions of the processor state, which is known as the programmer's visible state. Includes: program register, condition code, program status, program counter, and memory.

Y86-64 directive: The y86-64 instruction is a subset of the x86-84 instruction set. It includes only 8-byte integer operations. There are 4 integer operations directives: ADDQ, SUBQ, ANDQ, and Xorq. There are 7 jump commands: jmp, Jle, JL, je, jne, Jge, and JG. There are 6 conditional delivery directives: Cmovle, CMOVL, Cmove, Cmovne, Cmovge, and CMOVG.

Assemble the conversion between machine codes.

Y86-64 Status Code:
Code value 1, named AOK, indicating normal operation;
The code value 2, named Hlt, indicates that the halt command is executed by the encountering device;
Code value 3, named ADR, indicates that an illegal address was encountered;
Code value 4, named Ins, indicates that an illegal instruction was encountered.

Y86-64 Instruction Set:

Y86-64 Program Register Identifier:

function code for the y86-64 instruction set:

逻辑门：逻辑门是数字电路的基本计算单元。它们产生的输出，等于它们输入位值的某个布尔函数。包括：与（AND）、或（OR）和非（NOT）。组合电路：将狠多的逻辑门组合成一个网，就能构建计算块。组合电路和HCL布尔表达式字级的组合电路和HCL整数表达式实现所有Y86-64指令所需要的计算可以被组织成6个基本阶段。包括：取指、译码、执行、访存、写回合更新PC。

Fetch refers to: The reference phase reads the instruction bytes from memory, and the address is the value of the program counter.

Decoding: The decoding phase reads a maximum of two operands from the register file, obtains the corresponding value, and reads the register specified in the instruction.

Execution: The ALU either executes the operation specified by the instruction, computes the valid address of the memory reference, or increases or decreases the stack pointer.

Visit: The data can be written to memory or read from memory.

Writeback: Write-back Stage can write up to two results to the register file.

Update PC: Sets the PC to the address of the next instruction.

SEQ的时序：SEQ的实现包括组合逻辑和两种存储器设备：时钟寄存器和随机访问存储器。

Organization calculation principle: never read back. The processor never needs to read the state updated by the instruction in order to complete the execution of an instruction.

Last week's exam error summary 1.

The following jump commands are related to ZF ()
A. jmp
B. Je
C. js
D. Ja
E. JB
F. Jbe
Analytical:

2.

Assuming that the function of the C-expression T=a+b is completed with the add instruction, the correct statement about the condition Code Register is ()
A. If t==0, then zf=1
B. If t<0, then cf=1
C. If t<0, then sf=1
D. if (a<0==b<0) && (t<0! = a<0), then of=1
E. if (a<0==b<0) && (t<0! = a<0), then cf=1
F. LEAQ directive does not affect the condition code register
G. CMP directives do not affect the condition code register
Analysis: Textbook p135
ZF: 0 logo. The result of the recent operation is 0, so when the T==0,zf=1,a
CF: Carry flag. The most recent operation resulted in rounding of the highest bit. B e wrong
SF: Symbol flag. The most recent operation has a negative result.
Of: Overflow flag. The most recent operation resulted in a complement overflow-positive overflow or negative overflow. (a<0==b<0) && (t<0!=a<0) signed overflow, so select D
LEAQ instruction does not change any condition code, select F
The CMP directive sets the condition code based on the difference of two operands. The behavior of the sub instruction is the same, except that it only sets the condition code and does not update the destination register.

3.

X86-64 Linux, about MOV, below right is ()

A. MOVW $0x50,%eax
B. MOVW%BP,%SP
C. MOVL ($1234), ($2345)
D. Movb, (%RSP)
E. movq%rax, 4 (%RBP)
F. Movb (%rdi,%RCX),%ah
Parsing: Textbook p122, p123, note memory can not directly between MOV, to use register relay. B,w,l,q represents the length to match the register.

2018-2019-1 20165304 "Information Security system Design Fundamentals" Fourth Week study summary