26-pae Sub-page

I believe you have been very proficient in the three-segment paging. But do you realize that there are some limitations to the way linear addresses are mapped to physical addresses.

It can map the maximum physical address, and can only be 0xffffffff. The reason is that the high 20 bits in the PTE are saved as page numbers, the maximum number of pages that can be saved is 0xfffff, and each page occupies 4KB, so the physical offset of the physical page with page number 0xfffff is 0xfffff000.

It's a bit annoying to say that you save the page number every time. PDE and Pte become physical base addresses since the lowest 12 bits of PDE or Pte are erased by 0. So in the future we will directly say that PDE, PTE preservation is the physical base. As a result, PDE, PTE occupies 4 bytes, and the maximum physical base address that can be indexed is naturally 4GB.

If you want to insert a 8GB memory bar, 4GB is wasted. Because the three-segment paging simply does not index the high 4GB portion of the memory strip.

In fact, CPU hardware engineers have long been aware of this problem, they designed a new paging method--pae pagination. PAE Paging

Three-section paging, is to split the linear address into the form of 10-10-12, and PAE paging, is to split the linear address into the 2-9-9-12 of the four-segment, that is, 3-segment index plus offset. Two of these 9 are Page Catalog table index and page table index respectively. So what's the index of 2. Instead, look at Figure 1 first.


Figure 14 Segment-Linear address mapping

2-9-9-12 Paging mode:

Based on CR3, locate page Directory Pointer table in page Directory Pointer table based on the first-level index query to page directory in page directory based on level two index The page table finds the fourth offset in the physical page by querying to a normal 4KB physical page in page table based on a level three index.

According to the above description, the first index is actually the index of the table of Page Directory Pointer table (PDPT).

The following color map may help you to understand.

Figure 2 cr3-pdpt-pdt-ptt-physical page relationship

To be able to control, I moved the three-paragraph 10-10-12 figure.


Figure 33 Segment pagination

The difference between figure 2 and Figure 3 is that the PAE paging has one more level of PDPT. The official translation is the page catalog pointer table, which is referred to as the top-level catalog table for ease of understanding. In this table, each table entry is called Pdpte, which is the page Directory pointer table entry, which holds the base address of the page directory.

PDE and PTEs in three-segment paging are 4 bytes, with 1024 table entries for both PDT and PTT.

In PAE paging, PDPT has only 4 table entries, PDT and PTT have 512 table entries, and the size of Pdpte, PDE, PTE is 8 bytes.

The PDPT table occupies a total of 32 bytes, and the PDT and PTT tables still occupy 4KB of physical pages.

Back to the first question, how does PAE map a linear address to a physical page other than 4GB. Then we need to study the structure of PTE. PTE Structure

Figure 4 PTE Structure

If you remember 10-10-12 's PTE, then you must not be unfamiliar with PAE paging. The low 12 bits are still attributes, the only difference being that the Page Base Address is changed from the original 20 bits to the current 24 bits, with a 4-bit expansion relative to the previous one.

Note This 28 bits from 36-63 bits are reserved bits, which are not available.

This means that PTE can index the physical page number from the original 220 2^{20} to the current 224 2^{24}, and similarly, a physical page size of 4KB, then the maximum physical address that PTE can index to will reach 224X212=64GB 2^{24} \times 2^ {A} = up to GB.

In fact, what PAE does is to break the 4GB virtual space of the linear address into the space of the physical address. How to understand that. It should look like Figure 5.

Figure 5 PAE Paging vs. three-segment paging.

In Figure 5, the different colors represent a 4 KB page (it is certainly not possible to draw too many pages in the picture, just to do a demo). As you can see, the advantage of PAE paging is that it can take advantage of a larger range of physical addresses. However, the total number of physical pages that can be mapped remains the same (only 4 regions in 64GB space can still be used). PDE and PDPT structures

Figure 6 PDPT Structure

Unlike three-segment paging, PAE paging has a pdpt table, the top-level catalog table, which is used primarily to find the base address of the page directory. Because the first index of the 2-9-9-12 page occupies only 2bit, you can index up to 4 pages of table of contents.

Figure 7 PDE Structure

Basically, except for the number of bits in the physical base address, there are no changes to the other 10-10-12 pagination. Summary

This article mainly introduces the principle of PAE paging, it is necessary to master the concept of PDPT top-level directory table, which holds the physical base address of the page directory.

I know you can't wait to have a try. Before we used the default is 10-10-12 paging mode. How to change into PAE paging mode. We turn the time back to the No. 0 article "Environment Configuration" that one, remember the following picture?

All you need to do is change the red box parameter/execute=optin to/noexecute=optin. After saving and restarting your virtual machine, you can do the PAE paging experiment.

Figure 8 Configuring the operating system using PAE paging

Here is the equivalent of leaving a little practice, little friends, move your hands.