2.ok6410 Hardware Introduction

2.ok6410 Hardware Introduction

Figure 2-1 OK6410 Bottom + Core Board

OK6410 The development Board is based on Samsung's latest ARM11 Processor s3c6410 , with a strong internal

resources and video processing capabilities to run reliably in 667MHz frequency above, support Mobile DDR and a variety of

NAND Flash . the OK6410 Development Board incorporates a wide range of high-end interfaces such as composite video signals, cameras,

USB , SD LCD, Ethernet, and equipped with temperature sensor and infrared receiver first class. These interfaces can be used as

Help users achieve high-end product-level design for application reference.

OK6410 Development Board with ' core Board ' + Bottom plate ' structure, core Board size specification for ' 5CM x 6CM ',

the bottom plate size is ' 10.5CM x 14CM ' between the core board and the backplane, using 4 Group of high quality imported connectors (nickel

Gold process, good contact, antioxidant), total the A PIN ( the x 4 ) to facilitate the development of two times for customers,

extend the application in various forms. OK6410 Development Board design in strict accordance with the CE,CCC and other domestic and foreign electronic

product certification standards, fully consider the integrity of high-speed signal and other electromagnetic compatibility measures to ensure OK6410 Development Board in

Reliable operation in harsh electromagnetic environments.

OK6410 the software system currently supports WinCE 6.0 , LINUX2.6.28 , Android2.1 as well

Uc/os-ii , a standard board-level support package ( BSP ) and open source, which contains all the drivers of the interface

The customer can load the application directly. In addition, the board can be connected to the Infineon company with the use of serial port extension

board, WIFI modules, camera modules, and more.

2.1 OK6410 Core Board Introduction

Figure 2-2 OK6410 Core Board

2.1.1 Core Board Resources

?? Samsung s3c6410 processor, arm1176jzf-s Core, Frequency 533mhz/667mhz

?? long and wide dimensions only 5cm*6cm , is now the industry's smallest

?? Pinout up to the fully meet the various expansion needs of users

?? 256M bytes DDR Memory, SLC 1G Byte Nand Flash , fast, stable industrial-grade chips,

Ten million writes ( Ten times the MLC )

?? 12MHz , 48MHz , 27MHz , 32.768KHz Clock Source

?? imported high-quality board-to-board connectors for long-term operational reliability

?? Support 5V Voltage Supply

2.2 OK6410 Development Board Backplane Introduction

Figure 2-3 OK6410 baseplate

2.2.1 Serial Port

OK6410 Development Board Design has 4 the serial port of the road, including 1 a five-wire RS-232 level serial Port ( DB9 female) and 3

a three -wire TTL level serial Port ( 20pin 2.0mm for the special needs of the user, this product

the product has developed a special supporting serial terminal board. Where the UART0 default is the debug serial port, can directly with the PC

to view system debug information. Serial 0 design schematic diagram is as follows;

Figure 2-4 Serial Port 0 schematic diagram

COM0 located in the Development Board bottom Slab, COM0 in the schematic, the name of the parent block is Rs232_9 ,

Figure 2-5 COM0

2.2.2 Network Interface

OK6410 The Development Board integrates a 100M Ethernet interface, via Dm9000ae chip to expand. In developing

process, the Ethernet interface can be used to connect PC Machine Download WINCE Mirror, in Linux system development, you can

used to Mount NFS Network File System. When using, connect the PC directly via a crossover cable , or you can use a direct-connect

The network cable connects the switch or router.

Dm9000ae Interrupt Signal Usage s3c6410 Processor Interrupt ' EINT7 ' signal.

The network port socket adopts RJ45 socket, built-in transformer.

2.2.3 JTAG Interface

OK6410 Development Board JTAG interface uses 10X2 pin connector (CN2) .

s3c6410 Processor Design JTAG interface is used to access ARM11 cores or on-chip devices that can be Sbgsel

The configuration of the signal is selected, the specific configuration is as follows:

Dbgsel When the signal is high, JTAG The interface connects the processor peripherals.

Dbgsel When the signal is low, JTAG Connection Access ARM11 Kernel for code debugging.

OK6410 of the Development Board Dbgsel The signal can be passed J9 jumper to select.

JTAG design schematic diagram:

Figure 2-6 JTAG schematic diagram

PCB the pin of the silk-print layer triangle points to JTAG interface The first pin, all pins can be based on the schematic diagram to

See how you connect. the JTAG Interface is located on the board backplane.

Figure 2-7 JTAG Physical Map

2.2.4 Audio Interface

Figure 2-8

Sound card Chip

The OK6410 Development Board audio feature uses the AC97 bus of the s3c6410 processor. External WM9714 Audio Core

Integrated audio output, line in input, and Mic input functions. Audio output and MIC input as well as line in

Standard audio sockets are used.

Figure 2-9

WM9714 chip and audio line schematic diagram

2.2.5 User keys

The board has a total of 6 user test keys, which are directly derived from the CPU interrupt pin, belong to the low-power

The 6 keys are defined as follows:

2.2.6 PWM Control Buzzer

Figure 2-11

PWM Control Buzzer

The buzzer buzzer of the Development Board is controlled by PWM0, and the schematic diagram is shown below, wherein PWM0

Should be GPF15, the pin can be set to the PWM output by the software, or it can be used as a normal GPIO.

2.2.7 Startup mode

The S3C6410 processor supports a variety of start-up modes, such as NAND Flash, NOR Flash, and SD cards, to determine the appropriate starting mode by configuring the PIN's different states when the system is powered up.

The OK6410 Development Board selects the boot mode by configuring the DIP switch SW2, as shown in:

Note: (1) The SW2 switch on is "1", when OFF is "0", "X" is high or low level.

(2) OK6410 Development Board Factory default setting is NAND FLASH boot mode.

2.ok6410 Hardware Introduction