I am ashamed to say that I have been engaged in many things in school for a long time, but I did not seriously do the basic things of 51 single chip microcomputer. I had just learned 51 for more than a week, I switched to the 16-bit single-chip microcomputer of Apsara stack, so that 51 has not been thoroughly understood.
It would be better for me to know exactly what kind of S12 single-chip RAM, flash size, but 51's uncertain answer.
For example, I have seen this problem again today before, but since I have never been very familiar with assembler programs, I am not clear about data, idata, xdata, and pdata in 51 single-chip microcomputer, but today, I don't want to take it off, so I decided to make it clear.
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I will attach 51 pieces of content to my memory again.
. 8-bit CPU-4 Kbytes program memory (ROM) (8 K for 52)
· Bytes of data storage (RAM) (52 has bytes of RAM)
· 32 I/O Ports-111 commands, most of which are single-byte commands
· 21 special registers
· 2 Programmable Timing/counters · 5 interrupt sources and 2 priorities (52 and 6)
· A full-duplex serial communication port
· The addressing space of the external data storage is 64 KB.
· The external program memory addressing space is 64 KB
· Logic operation bit addressing Function · dual-row direct insertion 40pindip Encapsulation
· Single + 5 V power supply
CPU: it consists of operation and control logic, as well as Interrupt System and some external special function registers;
Ram: used to store data that can be read and written, such as intermediate results, final results, and data to be displayed;
ROM: used to store programs, some raw data, and tables;
I/O port: Four 8-bit parallel I/O ports, which can be used for both input and output;
T/C: two timer/stenographer, which can work either in the timer mode or in the notation mode;
Five interrupt control systems;
A full-duplex UART (Universal asynchronous receiving TRANSMITTER) serial I/O port is used to realize serial communication between single-chip microcomputer or between single-chip microcomputer and microcomputer;
In-chip oscillator and Clock generation circuit, Z crystal and fine-tuning capacitor need to be external. The maximum oscillation frequency is 12 Mb.
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Back to the topic, from the data storage type, the 8051 series includes on-chip and off-chip program storage, on-chip and off-chip data storage, in-chip program memory is also divided into direct addressing areas and indirect addressing types, corresponding to code, Data, xdata, idata, and pdata types set according to 51 series of features, using different storage, the program execution efficiency will be different. It is best to specify the storage type of the variable when writing the C51 Program, which will help improve the program execution efficiency (this issue will be discussed later ). Different from the ANSI-C, it only divides samll, compact, large mode, a variety of different modes correspond to different actual hardware systems, there will also be different compilation results.
Differences between data, idata, xdata, and pdata in the 51 series:
Data: fixed the first 128 Ram records of 0x00-0x7f, which can be read and written directly by using ACC, with the fastest speed and generated code.
Minimum.
Idata: fixed the first 256 Ram records of 0x00-0xff. The first 128 is the same as the first 128 of data.
The question is different. Idata is accessed using pointers similar to those in C. The statement in the Assembly is:
Mox acc, @ Rx ).
Xdata: External extended RAM, usually refers to the external 0x0000-0xffff space, accessed with dptr.
Pdata: an external extended RAM of up to 256 bytes, read and write when the address appears on the A0-A7, with movx ACC, @ RX
Read/write. This is special, and the C51 seems to have this bug. We recommend that you use it less. But it also has its advantages
Body usage is an intermediate issue, not mentioned here.