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I/O port is a very common peripheral in the microcontroller, STM32 I/O port has 8 states, although the use of the process has not encountered any problems, but has not been very clear, so here is a summary (actually the concept is also and STM8 and other microcontroller, understand the 8 state, It also basically understands most I/O ports).
2 colors
We can see the following code in "Stm32f10x_gpio.h" in the library file:
- typedef enum
- {
- GPIO _mode_ain = 0x0,
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- }GPIOMODE_TYPEDEF;
Because it is English, not very clear, the following translation below:
- typedef ENUM
- {
- Gpio_mode_ain = 0x0,/ * Analog input * /
- ? gpio_mode_in_floating = 0x04,/ * Float input, reset status * /
- ?? GPIO_MODE_IPD = 0x28,/* drop-down input, where the drop-down refers to the resistor inside the microcontroller * /
- ?? Gpio_mode_ipu = 0x48,/ * pull-up input, where the pull-up refers to the resistor inside the microcontroller * /
- ?? Gpio_mode_out_od = 0x14,/ * open-Drain output * /
- ?? GPIO_MODE_OUT_PP = 0x10,/ * push-Pull output * /
- ?? Gpio_mode_af_od = 0x1C,/ * multiplexed open-Drain output * /
- ?? GPIO_MODE_AF_PP = 0x18/ * Multiplexing push-Pull output * /
- }gpiomode_typedef;
In the chip data we can see that the basic structure of the I/O port is as follows (the basic structure diagram of the 5V compatible I/O bits omitted):
Since we are using library development, this article will no longer be scanned for specific bit operations.
3 Separate Introduction
3.1 Analog input (Analog input)
As the name implies, this I/O port (input/output port) is used as input and is analog input. Analog input state is used to accept analog (voltage value), generally used for ad acquisition.
3.2 Floating-air input (floating input)
Also known as levitation input, the float input and pull-up input is generally done by analogy learning. In the pull-up input, a pull-up resistor is connected to the power supply VDD through the switch, and when the pin is not connected to an external circuit, the I/O pin level of the pull-up input mode is determined high (the same, the drop-down input is the low level determined). The float input is different, its battery water hi is uncertain, even if a small external input signal will make it change. If the pin is set to dangling, reading the level of the port is indeterminate.
3.3 Dropdown input (input down)
As the name implies, it is well understood that you can see the 3.2 floating-space input .
3.4 Pull-in input (input up)
As the name implies, it is well understood that you can see the 3.2 floating-space input .
3.5 open-drain outputs (open Collector output)
The output is equivalent to the transistor collector, to obtain a high-level state requires a pull-up resistor. Suitable for the current-type drive, its ability to absorb current is relatively strong (generally 20mA or less). The circuit of the open-drain form has several features:
1, the use of external circuit drive capability, reduce the internal drive IC. When the IC internal MOSFET is on, the drive current flows from the external VCC through the pull-up resistor, MOSFET to GND. Only a small gate drive current is required inside the IC.
2, generally, the open-drain is used to connect different levels of the device, matching the level with, because the open-drain pin is not connected to the external pull-up resistor, can only output low level, if you need to have the function of high output level, it is necessary to connect the pull-up resistor, a good thing is to change the power supply voltage, For example, with the pull-up resistor you can provide Ttl/cmos level output and so on. (The resistance value of the pull-up resistor determines the speed of the logic level conversion.) The higher the resistance, the lower the power consumption, so the choice of load resistance should take into account both power consumption and speed. )
3, open-drain output provides a flexible output mode, but also has its weaknesses, is to bring the rising edge of the delay. Because the rising edge is the load charging through the external pull-up passive resistor, so when the resistance choice hour delay is small, but the power consumption is large, and the delay large power consumption is small. Therefore, if the delay is required, it is recommended to use a falling edge output.
4, multiple open-drain outputs can be connected to a line. With a pull-up resistor, the "and logic" relationship, i.e. "line and", is formed without adding any devices. Can be simply understood as: in all pins together, an external pull-up resistor, if there is a pin output logic 0, the equivalent of grounding, parallel with the circuit "equivalent to a short circuit", so the logic level of the external circuit is 0, only the high power, and the result is logic 1.
Open-Drain output is not the output voltage, low-power grounding, high-power normally not grounded. If an external pull-up resistor is applied, the voltage at the output high is pulled to the supply voltage of the pull-up resistor. This approach is suitable when the connected peripheral voltage is lower than the single-chip electromechanical. The output end is similar to open collector, and the working principle is the same. The difference is that the open-drain output uses a FET, which should be coupled with a pull resistor. (Quite round, have the opportunity to introduce with concrete project)
3.6 Push-pull outputs (push-pull output)
Push-pull output can output high, low level, connect digital devices; Push-pull structure is generally referred to two transistors by two complementary signal control, always in one transistor on the time of the other cutoff. The high and low levels are determined by the IC's power supply.
Push-pull circuit is two parameters of the same transistor or MOSFET, to push-pull mode exists in the circuit, each responsible for positive and negative half-cycle of the waveform amplification task, the circuit work, two symmetrical power switch tube only one conduction at a time, so the conduction loss is small, high efficiency. The output can either sink current to the load or pump current from the load. The push-pull output stage increases the load capacity of the circuit and increases the switching speed.
On the push-pull output and the open-drain output, with a simple graph to summarize: the figure of the left is the push-pull output mode, where the comparator output high power at the time below the PNP transistor cutoff, and the above NPN transistor conduction, output level vs+; When the comparator output is low, the reverse is the PNP transistor conduction, The outputs are connected to the ground and are low-level. The right side can be understood as the open-drain output form, need to pull up.
3.7 multiplexed open-drain output
Can be understood as the configuration when the Gpio port is used as a second function (i.e. not used as a generic IO port).
3.8 Multiplexing push-pull output
As with the multiplexed open-drain output, it can be understood as the configuration when the Gpio port is used as a second function (i.e. not used as a generic IO port).
4 Summary of Usage scenarios
1, floating empty input gpio_in_floating--float input, you can do key recognition, RX1.
2, with pull-up input gpio_ipu--io internal pull-up resistor input, sometimes also used as key is some.
3, with pull-down input gpio_ipd--io internal pull-down resistor input, sometimes also used as key is some.
4, Analog input gpio_ain--application ADC analog input, or low power consumption of power saving.
5, open-drain output gpio_out_od--io output 0 Gnd,io Output 1, floating, external pull-up resistor is required to achieve high output level. When the output is 1 o'clock, the status of the IO port is pulled high by the pull-up resistor, but because it is an open-drain output mode, the IO port can be changed from an external circuit to a low level or unchanged. Can read IO input level change, realize C51 io bidirectional function.
6, push-pull output Gpio_mode_out_pp--io output 0-connected gnd, IO Output 1-to VCC, read input value is unknown. Use the most.
When using the SPI chip, the chip selection pin is the mode.
7. Push-pull output of multiplexing function gpio_af_pp--on-chip peripheral function (I²c SCL,SDA)
8, multiplexing function of the open-drain output gpio_af_od--on-chip peripheral function (Tx1,mosi,miso. SCK. SS)
When using the SPI chip, SCK Miso mosi discipline is the mode
5 STM32 Project Examples
1, as a normal GPIO input: Configure the PIN as required for floating input, with weak pull-up input or with weak pull-down input, and do not enable the pin corresponding to all the reusable function module.
2, as the ordinary Gpio output: Configure the PIN as required for push-pull output or open-drain output, and do not enable the pin corresponding to all the reusable function module.
3, as a general analog input: Configure the PIN as analog input mode, and do not enable the pin corresponding to all the reusable function module.
4, as the input of the built-in peripherals: Configure the PIN as required for the float input, with a weak pull-up input or with a weak pull-down input, while enabling the pin corresponding to a reusable function module.
5, as the output of the built-in peripheral: Configure the PIN as needed for multiplexing push-pull output or multiplexed open-drain output, while enabling the pin corresponding to all the Multiplexed function module.
Note If there are multiple multiplexed function modules that correspond to the same pin, only one of them can be enabled, and the other modules remain in a non-enabled state. For example, to use the STM32F103VBT6 47, 48 feet of the USART3 function, you need to configure 47 feet for multiplexing push-pull output or multiplexed open-drain output, configuration 48 feet for a certain input mode, while enabling the USART3 and maintain i2c2 non-enabling state. If you want to use STM32F103VBT6 's 47 foot as the TIM2_CH3, you need to remap the TIM2 and then configure the corresponding pin in the same way as the multiplexing feature.
"End/2016-01-15"
8 modes of operation for Gpio in STM32