A brief introduction to memory management of kernel learning

Memory is one of the most important resources managed by the Linux kernel, and the memory management subsystem is one of the most important parts of the operating system. Familiar with Linux memory management system is very important for engineers who aspire to engage in kernel development. Earlier DOS had direct access to memory, so that different applications could easily crash the system. In today's Linux system, the application creates a trap into the kernel, where the kernel is secure. Virtual memory enables applications to be used continuously. Memory space that is larger than the actual memory, which may be physically discrete or even switched to disk. So to speak. The memory management of modern operating system is the management of virtual memory.

First, memory address:

Intel's early 8086/8088 processors only work in real address mode (Real-address-mode) and do not effectively support the virtual memory management capabilities required by today's multitasking operating systems. Intel implements protection mode from 80286 Protected mode The processor is a 16-bit processor. 80386 is 32 processor. Since 80386 Intel CPU experienced 80486, Pentium, etc., although in the speed function improved a lot, but its architecture has no fundamental changes in substance, so collectively referred to as IA32 (Intel architecture bit)

80386 from the 8086,80286, in order to maintain upward compatibility, but also retained the previous 16 for the segment registers. Although it is possible to achieve effective memory protection using only paging mechanism, it is also necessary to implement the protection mode on the basis of segmented mechanism, so the segmentation mechanism in IA32 architecture is largely the result of the compatibility of Intel products.

Now almost all of the RISC architecture processors do not support the segmented mechanism to implement the memory protection between multitasking with only a paging mechanism. At the same time, the memory management in Linux is as far as possible without the IA32 architecture in the segmentation mechanism, but only when forced to use, which also increase the portability of Linux.

Physical Address: Refers to the address signal of the addressing physical memory appearing on the CPU address bus select、read, is the result of address transformation

Logical address: Is the address of the program code that appears in the assembler after it has been compiled

Linear address: A linear address, also known as a virtual address, under 32-bit CPU architecture. Can indicate that the 4GB address space is expressed in hexadecimal as: 0x00000000 to 0xFFFFFFFF

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Conversions between addresses:

In a contemporary operating system based on the IA32 architecture (with protection mode and paging mechanism), access to a single memory unit requires two address conversions:

The CPU converts a logical address into a physical address: The CPU uses the segment-type memory snap-in to convert the logical address to a linear address, which translates the linear address into a physical address using the page-style snap-in.

In most RISC, only one linear address to the physical address of the conversion can be, in most RISC cases without the concept of segmentation, there is no logical address.

Segment Registers:

The IA32 architecture provides only segment registers. In real mode The register is used to store the Janki address, at which point we call the segment register as the Janki address register. In protected mode, the segment registers are used to hold the segment selector, at which point we call the segment register the segment selector sub register. Janki Address registers and segment selector registers are different interpretations of segment registers in different modes. The segment registers provided by the IA32 architecture include CS,DS,SS,ES,FS,GS. Although only 6 registers are used, the program can use a register for different purposes. Put the value in the storage and then restore it. Segment registers are considered to be increased by segmented memory management.

CS: Code segment Register, CS is to point to the storage program segment. SS: Stack segment registers, pointing to segments of the current program stack. DS: A data segment register that points to a segment that contains static data or global data. Other segment registers can be used for other purposes, pointing to any segment.

Janki Address register: In this mode, 32-bit CPU memory management is consistent with the 16-bit CPU. The IA32 architecture is in real mode where the logical address is determined by a segment base address and an offset within a segment. The Janki address register holds a 16-bit Janki address, which is also a 16-bit data. In real mode, the linear address is the physical address.

Linear address = 16-bit segment base Address *16 + offset

Segment Select sub-register: In protected Mode, a segment is selected by a single paragraph and a segment offset is determined. A 32-bit base address can be obtained based on the segment selection sub register. The offset is 32-bit data, and the maximum capacity of each segment is up to 4GB.

Linear address = 32-bit segment base Address + 32-bit offset data