A fast verification method of FPGA image processing algorithm

In fact, the verification platform instead of board-level verification.

We can instantiate a mem block in Testbench and put a. mif file into the mem block. The. mif file is transferred from a image file by matlab or other exe. On the othe hand, Verilog Bench can write processed data back into a. txt file, which can be transferred back into image b y matlab or other exe.

By doing this, we no further need image acquisition gear and image display gear before and after the FPGA algorithm module. This extremely simplifies the veification flow of the FPGA algorithm.

PS. mif file is abbreviated from memory initialization file.

A fast verification method of FPGA image processing algorithm