About Mac, MII, and PHY

Source: Internet
Author: User

Ethernet is a computer LAN networking technology based on the IEEE 802.3 standard. It specifies the contents of the physical layer connections, electrical signals, and media access layer protocols. Ethernet is currently the most widely used LAN technology. It largely replaces other LAN standards, such as the licensing ring, FDDI, and ARCNET. After the rapid development of M Ethernet at the end of the last century, Gigabit Ethernet and even 10G Ethernet are continuously expanding their application scope under the impetus of international organizations and leading enterprises. Ethernet-based applications have been a research and development hotspot for a certain period of time.

Ethernet interfaces are essentially the process in which Mac controls the PHY through the MII bus.

Mac is short for media access control, that is, the sub-layer protocol of media access control. The Protocol is located in the lower half of the data link layer in the OSI Layer 7 protocol and is mainly responsible for controlling and connecting physical media of the physical layer. When sending data, the MAC protocol can determine whether data can be sent in advance. If data can be sent, it adds some control information to the data, and finally sends the data and control information to the physical layer in the specified format; when receiving data, the MAC protocol first checks the input information and determines whether a transmission error has occurred. If there is no error, the control information is removed and sent to the LLC layer. Ethernet MAC is defined by IEEE-802.3 Ethernet standards.

MII is an independent media interface. "Media Independence" indicates that any type of PHY device can work normally without re-designing or replacing Mac hardware. Two independent channels are used for the transmitter and receiver respectively. Each channel has its own data, clock, and control signal. The MII data interface requires a total of 16 signals, including tx_er, txd <:0>, tx_en, tx_clk, Col, rxd <:0>, rx_ex, rx_clk, CRS, and rx_dv.

MII transmits data in four-byte bidirectional transmission with a clock rate of 25 MHz. The working rate can reach 100 Mb/s. The MII management interface is a dual-signal interface. One is a clock signal and the other is a data signal. Through the management interface, the upper layer can monitor and control the phy. Its management is implemented by using the SMI (Serial Management Interface) bus to read and write the register of the phy. Some registers in the PHY are defined by IEEE. In this way, the PHY reflects its current status to the Register, mac constantly reads the Status Register of the PHY through the SMI bus to get the current PHY status, such as connection speed and duplex capability. Of course, you can also set the register of the PHY through SMI to achieve the purpose of control. For example, if the throttling is enabled or disabled, the self-negotiation mode or the forced mode can be used. Both the MII bus for physical connection and the State registers and control registers for the SMI bus and the PHY have IEEE specifications. Therefore, the Mac and the PHY of different companies can coordinate their work. Of course, in order to match the features specific to PHY of different companies, the driver needs to be modified accordingly.

Phy is a physical interface transceiver that implements the physical layer. Including the MII/gmii (Media independent interface) Sub-layer, PCs (physical encoding sub-layer), PMA (physical media attachment) Sub-layer, PMD (physical media-related) Sub-layer, and MDI sub-layer.

100basetx adopts 4b/5b encoding. When sending data, phy receives data from MAC (for phy, there is no frame concept, and for it, it is data regardless of the address, data or CRC ), an Error Code of 1 bit is added for every 4 bits. Then, parallel data is converted into serial stream data, and the data is encoded according to the encoding rules of the physical layer. Then, the data is sent as a analog signal. Otherwise. Another important feature of PHY is to implement some CSMA/CD functions. It can detect whether data is being transmitted on the network. If data is being transmitted, it waits. Once it detects that the network is idle, it waits for a random time and sends the data out. If the two send data at the same time, a conflict will occur. At this time, the conflict detection agency can detect the conflict and wait for a random time to resend the data. This random time is very exquisite. It is not a constant. The random time calculated at different times is different, there are multiple algorithms to cope with the second conflict between the two hosts with low probability. The communication rate is negotiated by both parties. The negotiation result is the maximum speed and the best duplex mode supported by both devices at the same time. This technology is called auto
Negotiation or Nway. The isolating transformer filters the differential signals sent from the PHY using the differential mode coupled coils to enhance the signal, and couple the signals to the other end of the connected network through the electromagnetic field conversion. In the RJ-45, 1, 2 are the data, and 3, 6 are the data. The new PHY supports the auto MDI-X feature (also requires isolation transformer support ). It can realize the transfer signal line on 1 and 2 of RJ-45 interface and the function of receiving signal line on 3 and 6 automatically exchange with each other

The network adapter works on the last two layers of OSI. The physical layer and the data link layer define the electrical and optical signals, line statuses, clock benchmarks, data encoding, and circuits required for data transmission and reception, provides standard interfaces to data link layer devices. The Physical Layer Chip is called Phy. The data link layer provides addressing mechanisms, data frame construction, data error check, transfer control, and standard data interfaces to the network layer. The data link layer chip in the ethernet card is called the Mac controller. Many NICs work together. The relationship between them is that the PCI bus is connected to the Mac bus, the Mac is connected to the phy, And the PHY is connected to the network cable (of course, it is not directly connected, there is also a pressure change device ).

  Mac and PHY use the data link layer and the physical layer to transmit data through MII.

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