ARM Assembler Instruction Set

0. ARM Registers

R13:sp

R14:LR 1. Jump Instructions

Jump instruction is used to implement the program flow jump, in the ARM program there are two ways to achieve the program flow jump:
1) Use specialized jump commands.
2) write the jump address value directly to the program counter PC.

By writing the jump address value to the program counter PC, you can achieve any jump in the 4GB address space, and use it together before jumping

MOV lr,pc

such as instructions, you can save the future return address value, so that in 4GB continuous linear address space of subroutine calls. The jump instruction in the ARM instruction set can complete the jump from the current instruction forward or backward 32MB address space, including the following 4 instructions:

1.1 Jump Instruction B

b{Condition} Destination Address

The B instruction is the simplest jump instruction. Once a b instruction is encountered, the ARM processor immediately jumps to the given destination address and proceeds from there. Note that the actual value stored in the jump instruction is an offset relative to the current PC value, not an absolute address, and its

Values are computed by the assembler (relative addressing in the reference addressing method). It is a 24-bit signed number, the left two-bit symbol expands to 32-bit, and the valid offset is 26 bits (the address space of the front and back 32MB). The following directives:
# The program unconditionally jumps to the label label to execute

B Label;

When the z-condition code is set in the #当CPSR register, the program jumps to the label label to perform
CMP r1,#0

BEQ Label 1.2 with connected jump instruction BL

bl{Condition} Destination Address
[CPP] View plain copy <span style= "font-family:arial;" >START   ...                  bl   next           @ Jump to label next, save current PC to R14                   ...                                      ...   next...                             @ Sub-program entrance                   mov   pc,r14         @ return  </span> &nbsp

BL is another jump instruction, but before jumping, it saves the current contents of the PC in register R14, so it can be executed by reloading the contents of the R14 to the PC to return to the command after the jump instruction. This directive is a basic but commonly used means of implementing subroutine invocation. 1.3 BLX Directive

BLX Destination Address

The BLX instruction jumps from the arm instruction set to the destination address specified in the instruction and switches the processor's working state from the arm state to the thumb state, which simultaneously saves the current contents of the PC to the register R14. Therefore, when the subroutine uses the thumb instruction set, and the caller uses the arm instruction set, the subroutine's call and the processor's working state can be toggled through the BLX instruction. Also, the return of the subroutine can be done by R14 the Register
The value is copied to the PC to complete. 1.4 BX Instruction

bx{Condition} Destination Address

The BX instruction jumps to the target address specified in the instruction, and the instruction at the destination address can be either an arm instruction or a thumb command. [CPP] view plain copy MOV R0, #0X0200 BX R0

2.  arithmetic operation directive
2.1  without carry addition instruction ADD      add{condition}{s} Purpose register, operand 1< Register, operand 2
    &NBSP;ADD instruction is used to add two operands and store the result in the destination register. The operand 1 should be a register, the operand 2 can be a register, a register that is shifted, or an immediate number. The
      example is as follows: [CPP] view plain copy add r0,r1,r2     & nbsp;  @ r0 = r1 + r2   Add r0,r1, #256        @ R0 = R1 + 256   add r0,r2,r3,lsl#1 @ r0  = R2 +  (r3 << 1)   
2.2  with carry addition instruction ADC       adc{conditions}{s} purpose register, operand 1< Register, operand 2
    &NBSP;ADC instruction is used to add two operands, plus the value of the C condition flag in CPSR, and store the results in the destination register. It uses a carry flag bit so that you can do the addition of a number larger than 32 bits, and be careful not to forget to set the S suffix to improve the bit flags. The operand 1 should be a register, the operand 2 can be a register, a register that is shifted, or an immediate number.

The following instruction sequence completes the addition of two 128-digit numbers, the first number is stored in the Register R7~R4, the second number is stored in the register R11~R8 by high to low, the result of the operation is stored in the register r3~r0 by high to Low:[CPP]View Plain copy ADDS R0,R4,R8 @ Plus low-end word ADCS r1,r5,r9 @ plus second word, with carry ADCS r2,r6,r10 @ Plus third word with carry ADC R3,r7,r11 @ Plus Four characters, with carry
2.3 minus carry subtraction subsub{conditions}{s} destination register, operand 1, operand 2
The SUB instruction uses the operand 1 minus the operand 2 and stores the result in the destination register. The operand 1 should be a register, the operand 2 can be a register, a register that is shifted, or an immediate number. This directive can be used for the subtraction of signed or unsigned numbers.
Examples are as follows:[CPP]View Plain Copy sub R0,r1,r2 @R0 = R1-r2 Sub R0,r1, #256 @R0 = r1-256 SUB r0,r2,r3,lsl#1 @R0 = R2- (R3 << 1)
2.4 with carry minus instruction SBCsbc{conditions}{s} destination register, operand 1, operand 2
The SBC instruction is used to subtract the operand 1 from the operand 2, minus the CPSR of the C conditional flag bit in the ID, and store the result in the destination register. The operand 1 should be a register, the operand 2 can be a register, a register that is shifted, or an immediate number. The directive uses a carry flag to represent borrow, so you can do more than 32-bit subtraction, and be careful not to forget to set the S suffix to improve the bit flags. This directive can be used for the subtraction of signed or unsigned numbers.
Examples are as follows:[CPP]View plain copy SUBS R0, R3, R6 @ minus minimum bit byte, without carry SBCS R1, R4, R7 @ minus second word, with carry SBCS R2, R5, R8 @ minus the third word, with carry #三句话实现了96bit减法运算, because arm register width is only 32bit so subtract three times
2.5 non-carry reverse subtraction instruction RSBrsb{conditions}{s} destination register, operand 1, operand 2
The RSB instruction is called the reverse subtraction instruction, which subtracts the operand 2 from the operand 1 and stores the result in the destination register. The operand 1 should be a register, the operand 2 can be a register, a register that is shifted, or an immediate number. This directive can be used for the subtraction of signed or unsigned numbers.
Examples are as follows:[CPP]View plain copy RSB R0, R1, R2 @R0 = R2-r1 RSB R0, R1, #112 @R0 = 112-r1 R SB R0, R1, R2, lsl#1 @R0 = (r2<<1)-r1
2.6 with carry reverse subtraction instruction RSCrsc{conditions}{s} destination register, operand 1, operand 2
The RSC instruction is used to subtract the operand 2 from the operand 1, minus the CPSR of the C conditional flag bit in the ID, and store the result in the destination register. The operand 1 should be a register, the operand 2 can be a register, a register that is shifted, or an immediate number. The directive uses a carry flag to represent borrow, so you can do more than 32-bit subtraction, and be careful not to forget to set the S suffix to improve the bit flags. This directive can be used for the subtraction of signed or unsigned numbers.

Examples are as follows:[CPP]View plain copy Rsbs R0, R6, R3 @ minus minimum byte, without carry RSCS R1, R7, R4 @ minus second word, with carry RSC S R2, R8, R5 @ minus the third word, with carry #三句话实现了96bit减法运算, because arm register width is only 32bit, so subtract three times2.7 Multiplication InstructionsAll operands in the multiplication instruction, the destination register must be a universal register, cannot use an immediate number or a shifted register for the operand, and the destination register and the operand 1 must be different registers.2.7.1 32-bit multiplication instruction Mulmul{conditions}{s} purpose register, operand 1< Register, operand 2< register >
The MUL instruction completes the multiplication of the operand 1 and the operand 2, and places the result in the destination register, and can set the corresponding conditional flag bit in the CPSR according to the result of the operation. where the operand 1 and operand 2 are 32-bit signed or unsigned numbers.
Examples are as follows:[CPP]View plain copy MUL r0,r1,r2 @R0 = r1xr2 muls r0,r1,r2 @R0 = r1xr2, while setting related conditional flags in CPSR
2.7.2 Multiply-accumulate instruction MLAmla{conditions}{s} destination register, operand 1, operand 2, operand 3
The MLA instruction completes the multiplication of the operand 1 and the operand 2, then the product is added to the operand 3, and the result is placed in the destination register, and the corresponding conditional flag bit in the CPSR can be set according to the result of the operation. where the operand 1 and operand 2 are 32-bit signed or unsigned numbers.
Examples are as follows:[CPP]View plain copy MLA r0,r1,r2,r3 @R0 = r1xr2 + R3 MLAs r0,r1,r2,r3 @R0 = R1xr2 + R3, while setting related conditional flags in CPSR
2.7.3 signed long multiplication instruction Smullsmull{condition}{s} purpose register low, purpose registers lower high, operand 1, operand 2
The smull instruction completes the multiplication of the operand 1 and the operand 2, and puts the low 32 bits of the result into the destination register lower, the high 32 bits of the result are placed into the destination register higher, and the corresponding conditional flag bits in the CPSR can be set according to the result of the operation. where the operand 1 and operand 2 are 32-bit signed numbers.
Examples are as follows:[CPP]View plain copy smull r0,r1,r2,r3 @R0 = (R2XR3) Low 32-bit, R1 = (R2XR3) high 32-bit @SMULL instruction implements 64bit signed multiply Method
2.7.4 unsigned number of long multiplication instructions Umullumull{condition}{s} purpose register low, purpose registers lower high, operand 1, operand 2
The umull instruction completes the multiplication of the operand 1 and the operand 2, and puts the low 32 bits of the result into the destination register lower, the high 32 bits of the result are placed into the destination register higher, and the corresponding conditional flag bits in the CPSR can be set according to the result of the operation. where the operand 1 and operand 2 are 32-bit unsigned numbers.
Examples are as follows:[CPP]View plain copy umull r0,r1,r2,r3 @R0 = (R2XR3) Low 32-bit, R1 = (R2XR3) high 32-bit @UMULL instruction implements 64bit unsigned number multiplication Method
2.7.5 signed Long multiplication-cumulative instruction Smlalsmlal{condition}{s} purpose register low, purpose registers lower high, operand 1, operand 2
The Smlal instruction completes the multiplication of the operand 1 and the operand 2 and adds the lower 32 bits of the result to the value of the low of the destination register and puts it into the destination register low, and the high 32 bits of the result are added to the value of the destination register higher and then placed in the destination register high. The corresponding conditional flag bit in CPSR can be set according to the result of operation. Among them, the operator
Count 1 and operand 2 are 32-bit signed numbers.
For the purpose register low, the 64-bit Addend 32 bits are stored before the instruction executes, and the lower 32 bits of the result are stored after the instruction executes. For the purpose register high, the 64-bit Addend 32 bits are stored before the instruction executes, and the high 32 bits of the result are stored after the instruction executes.
Examples are as follows:[CPP]View plain copy smlal r0,r1,r2,r3 @R0 = (R2XR3) Low 32-bit + R0;R1 = (R2XR3) high 32-bit + R1 @SMLAL refers to 64-bit signed multiply-accumulate instruction
2.7.6 unsigned long multiplication-cumulative instruction Umlalumlal{condition}{s} purpose register low, purpose registers lower high, operand 1, operand 2
The Umlal instruction completes the multiplication of the operand 1 and the operand 2 and adds the lower 32 bits of the result to the value of the low of the destination register and puts it into the destination register low, and the high 32 bits of the result are added to the value of the destination register higher and then placed in the destination register high. The corresponding conditional flag bit in CPSR can be set according to the result of operation. where the operand 1 and operand 2 are 32-bit unsigned numbers.
For the purpose register low, the 64-bit Addend 32 bits are stored before the instruction executes, and the lower 32 bits of the result are stored after the instruction executes. For the purpose register high, the 64-bit Addend 32 bits are stored before the instruction executes, and the high 32 bits of the result are stored after the instruction executes.
Examples are as follows:[CPP]View plain copy umlal r0,r1,r2,r3 @R0 = (R2XR3) Low 32-bit + R0;R1 = (R2XR3) high 32-bit + R1 @UMLAL instructions for 64-bit unsigned multiply-accumulate instruction
2.8 Comparison Instruction CMPcmp{conditions} operand 1, operand 2
The CMP directive is used to compare the contents of one register with the content or immediate number of another register, while updating the value of the conditional flag bit in CPSR. The instruction does a subtraction operation, but does not store the result, only changing the conditional flag bit. The flag bit represents the relationship of the operand 1 to the operand 2 (large, small, equal), for example, when the operand 1 is greater than the operation operand 2, then the command with the GT suffix will be executed.
Examples are as follows:[CPP]View Plain copy CMP R1,r0 @ Subtracts the value of the register R1 from the value of the register R0 and sets CPSR's flag bit CMP R1 based on the result, #100 @ Subtracts the value of the register R1 from the immediate number 100 and sets the CPSR flag bit based on the result
2.9 Negative comparison instruction CMNcmn{conditions} operand 1, operand 2
The CMN instruction is used to compare the contents of one register with the contents of another register, or to reverse the number of seconds, while updating the value of the conditional flag bit in the CPSR. The instruction actually completes the addition of the operand 1 and the operand 2, and changes the conditional flag bit based on the result.
Examples are as follows:
[CPP]View Plain copy CMN r1,r0 @ Adds the value of the register R1 to the value of the register R0 and sets the CPSR flag bit CMN R1 based on the result, #100 @ Adds the value of the register R1 to the immediate number 100 and sets the CPSR flag bit based on the result

3. Logic Operation Instruction 3.1 "and" directives andand{conditions}{s} destination register, operand 1, operand 2
The and instruction is used to perform logic and operations on two operands and to place the result in the destination register. The operand 1 should be a register, the operand 2 can be a register, a register that is shifted, or an immediate number. This directive is commonly used to mask some bits of the operand 1.
Examples are as follows:[CPP]View plain copy and r0,r0, #3 @ This instruction keeps the R0 0, 1 bits, and the rest of the bits zeroed.
3.2 "or" Directive Orrorr{conditions}{s} destination register, operand 1, operand 2
The ORR instruction is used to perform a logical OR operation on two operands and place the result in the destination register. The operand 1 should be a register, the operand 2 can be a register, a register that is shifted, or an immediate number. This directive is commonly used to set some bits of the operand 1.
Examples are as follows:[CPP]View plain copy ORR r0,r0, #3 @ This instruction sets R0 0, 1 bits, and the remaining bits remain the same.

3.3 "XOR" directive Eoreor{conditions}{s} destination register, operand 1, operand 2
The EOR instruction is used to perform a logical XOR operation on two operands and to place the result in the destination register. The operand 1 should be a register, the operand 2 can be a register, a register that is shifted, or an immediate number. This directive is commonly used to invert some bits of the operand 1.
Examples are as follows:
[CPP]View plain copy EOR r0,r0, #3 @ This instruction reverses R0 0, 1 bits, and the remaining bits remain unchanged.
3.4-bit purge instruction Bicbic{conditions}{s} destination register, operand 1, operand 2
The BIC directive clears some bits of the operand 1 and places the result in the destination register. The operand 1 should be a register, the operand 2 can be a register, a register that is shifted, or an immediate number. The operand 2 is a 32-bit mask, and if one is set in the mask, the bit is cleared. The mask bits that are not set remain unchanged.
Examples are as follows:[CPP]View Plain copy BIC r0,r0,#%1011 @ This directive clears bits 0, 1, and 3 in R0, and the remaining bits remain the same.
3.5 Test comparison instruction TSTtst{conditions} operand 1, operand 2
The TST directive is used to bitwise and compute the contents of one register and the contents or immediate number of another register, and updates the value of the condition flag in CPSR based on the result of the operation. The operand 1 is the data to be tested, and operand 2 is a bitmask that is typically used to detect whether a particular bit is set.
Examples are as follows:[CPP]View Plain copy TST r1,#%1 @ is used to test whether the lowest bit is set in register R1 (% = binary number) TST R1, #0xffe @ Sets the value of the register R1 with the immediate number 0xffe bitwise, and according to the result set CPSR flag bit, in the application Will add a jump command after TST
3.6 xor test instruction Teqteq{conditions} operand 1, operand 2
The TEQ instruction is used to bitwise XOR the contents of one register and the contents or immediate number of another register, and updates the value of the conditional flag bit in CPSR based on the result of the operation. This instruction is typically used to compare the operand 1 and the operand 2 for equality.
Examples are as follows:[CPP]View Plain copy TEQ R1,R2 @ Bitwise XOR The value of the register R1 and the value of the register R2, and sets the CPSR flag bit based on the result

4. Data transfer Instructions 4.1 Data transfer Instructions MOV

mov{condition}{s} destination register, source operand
The MOV instruction can be completed from another register, a shifted register, or an immediate number is loaded into the destination register. Where the S option determines whether the operation of the directive affects the value of the conditional flag bit in CPSR, and when no S is not updated the value of the conditional flag bit in CPSR.
Examples are as follows: [CPP] view plain copy MOV r1,r0 @ Transfer The value of the register R0 to the Register R1 MOV pc,r14 @ Transfer The value of the Register R14 to P