Arm bare metal Development (2) interrupt programming

The following bare metal program is based on gt2440 and the compiler is a arm-linux-gcc-4.4.3.

Program layout: the source code is composed of two files: interrupt. s and led. C. The interrupt is responsible for initialization, And the interrupt processing program is defined in led. C.

Program process: first install the abnormal vector table, disable the Watchdog in the reset exception, then enter the normal interrupt mode, set the treasure pointer for the normal interrupt (prepare for the interrupt handler written in C ), set it to the privileged mode, initialize the interrupt (set the IO pin to enable the interrupt), and finally wait for the external interrupt to trigger the endless cycle of the CPU. When the external interruption arrives, first protect the scene and jump to the LED. the handle_irp () function in C lights up the four LEDs in the function, returns the result, restores the scene, and returns the endless loop.

 

Interrupt. S:

1 // register physical address macro definition 2 # define wtcon 0x53000000 3 4 # define gpfcon 0x56000050 5 # define ngpf_int2 (0x02 <4) 6 # define ngpf_int0 (0x02 <0) 7 # define exint0 0x56000088 8 9 # define srcpnd 0x4a000000 10 # define intmod limit 11 # define intmsk limit # define priority limit 13 # define intpnd 0x4a000010 14 # defind limit ffset limit 15 16 17. section. text18. global _ start19 _ start: 20 @ abnormal vector table 21 B reset22 B Listen B soft_interrupt24 B abort_prefetch25 B abort_data26 B reserved27 B irq28 B fiq29 30 31 @ reset exception 32 Reset: 33 BL disable_watchdog @ jump to close watchdog program 34 MSR cpsr_c, #0xd2 @ enter normal interrupt mode 35 LDR sp, = 3072 @ set Stack pointer 36 MSR cpsr_c, # 0xdf @ set to privileged mode 37 38 BL init_int @ jump to interrupt initialization program 39 loop: 40 B loop @ endless loop 41 42 43 @ disable watchdog 44 disable_watchdog: 45 LDR r0, = wtcon 46 Bic R1, R0, #0x2047 STR R1, [R0] 48 49 mov PC, LR 50 51 52 @ interrupt initialization 53 init_int: 54 @ enable exint255 LDR r0, = intmsk 56 LDR R1, [R0] 57 Bic R1, R1, #0x0458 STR R1, [R0] 59 @ gpf2 set to the external interrupt function 60 LDR r0, = gpfcon61 LDR R1, = ngpf_int262 STR R1, [R0] 63 @ exint2 descent edge triggers the interrupt 64 LDR r0, = exint065 mov R1, #0x020066 STR R1, [R0] 67 MSR cpsr_c, # 0x5f @ enable CPU interruption 68 69 mov PC, lr70 71 72 @ normal interrupt exception entry 73 IRQ: 74 sub LR, LR, #4 @ fixed return address 75 stmdb SP !, {R0-r12, LR} @ Register into Stack 76 ldr lr, = int_return @ set interrupt handler return address 77 ldr pc, = handle_irq @ jump to interrupt handler (LED. c) 78 int_return: 79 ldmia SP !, {R0-r12, PC} ^ @ interrupt exception return, register out stack and recover CPSR register 80 81 82 83 underfinded_instruction: 84 B Listen soft_interrupt: 86 B soft_interrupt87 abort_prefetch: 88 B abort_prefetch89 abort_data: 90 B abort_data91 Reserved: 92 B reserved93 FIQ: 94 B FIQ

Led. C:

1 # define gpbcon (* (volatile unsigned long *) 0x56000010) 2 # define gpbdat (* (volatile unsigned long *) 0x56000014) 3 # define gpbup (* (volatile unsigned long *) 0x56000018) 4 5 # define ngpb_output (1 <10) | (1 <12) | (1 <14) | (1 <16) 6 7 # define srcpnd (* (volatile unsigned long *) 0x4a000000) 8 # define intpnd (* (volatile unsigned long *) 0x4a000010) 9 10 void handle_irq () 11 {12 gpbcon = ngpb_output; // Io is set to output 13 gpbdat = 0x0; // output low level 14 15 // clear interrupt source 16 srcpnd = 0x04; 17 intpnd = 0x04; 18}

Makefile:

1 interrupt.bin:2     arm-linux-gcc -c -o interrupt.o interrupt.S3     arm-linux-gcc -c -o led.o led.c4     arm-linux-ld -Ttext 0x00000000 interrupt.o led.o -o interrupt_elf5     arm-linux-objcopy -O binary -S interrupt_elf interrupt.bin6     rm -f interrupt_elf interrupt.o led.o7 8 clean:9     rm -f interrupt.bin

Run make and then download it to NAND flash through bios, and start it from NAND Flash.