ARM architecture and programming books

Chapter 1 arm overview and basic programming model.

7 running modes: User, fast interruption, external interruption, privilege, abort, undefined, and system mode. 37 registers: 31 General registers (0 ~ not backed up ~ 7. Backup 8 ~ 14. There are two types of R8 and R9: user and fast. Stack R13, connection register R14, PC R15) and six status registers (Program Status Register CPSR, in each mode, the backup program status register spsr ).

Reset, SWI software interruption (User-Defined interrupt command, realize System Call) and other interruptions.

Interrupt response and return process, size end.

Chapter 2 arm instruction classification and addressing methods.

Commands are classified into six categories: Jump, data processing, Program Status Register transmission commands, load/store commands, coprocessor commands, and abnormal interruptions.

Command syntax: <opcode >{< cond >}{ s }< RD >,< rn >,< shipter_operand>

The mnemonic condition affects the target R, the first R, and the second operand.

16 condition codes. Equal, unequal, size, overflow, positive and negative, unconditional execution, etc.

Addressing Mode.

The operand addressing mode of data processing commands: immediate number, register, and register shift.

The addressing method of the load/store command of characters and unsigned bytes, miscellaneous, and batch data transmission.

Chapter 3 Introduction to arm Instruction Sets. Some basic arm Instruction Function segments.

Four jump commands B (jump command), BL (jump command with return), blx (jump command with return and status switch), and Bx (jump command with status switch)

Three data processing commands: Data Transmission commands such as mov, arithmetic logic operations, and comparison commands.

Multiplication instruction, Status Register Access Instruction (Transfer Instruction from Mrs Status Register to General Register, transfer instruction from MSR General Register to Status Register)

Storage Access, abnormal interrupt generation commands (SWI, bkpt), coprocessor commands (CDP coprocessor data operation commands, LDC coprocessor data read commands, STC coprocessor data write commands, data transfer commands from the MCR arm register to the coprocessor register, and from the MRC coprocessor register to the arm register)

Function section:

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Chapter 4 Arm Assembly Language Programming. Pseudo operation, pseudo command, assembler format.

Chapter 5 arm Storage System. System Control coprocessor CP15, MMU, cache for storage management, and quick context switching.

Chapter 6 Introduction to atpcs.

Chapter 7 hybrid use of arm program and Thumb program.

Chapter 8 C \ c ++ and assembly language round Programming. Embedded Assembler for mutual calls.

Chapter 9 exception interrupt handling. To exit the abnormal interrupt process, install the interrupt handler, SWI, Fiq, and IRQ.

Chapter 10 arm C/C ++ Compiler. Compiler command format, pargmas, supported data types, predefined Macros in arm, and C/C ++ libraries in arm.

Chapter 2 arm Connector. Arm image file composition, connector generation, optimization, Runtime Library usage, using symbols from one image to another.

Chapter 4 embedded application examples. Storage ing: a c language program example of semihosting, an embedded system example, and an embedded system application that remaps ROM/Ram addresses.

Chapter 4 uses codewarrior. Configure and generate projects and project templates.

Chapter 4 debugging methods in the arm system. Debugging System Based on Angel and JTAG and use of ADW.