Arm interrupt mechanism

Reprinted please indicate the source

Author: Pony

According to your own understanding, we will give a brief description of the interrupt mechanism of the lpc2xxx family.

 

Interruption is an important function of embedded systems. arm provides two interrupt modes: IRQ and FIQ. in practice, IRQ is usually used. I won't talk about the IRQ interrupt response process (for example, saving the Status Register) Here. I can find all the books about arm. when the system detects an interrupt (the interrupt source), first go to the interrupt vector table to find the entry address of the interrupt service program corresponding to the interrupt source. arm supports 32 interrupt sources. this forms an interrupt vector table. therefore, one interrupt must be executed. One is to configure the interrupt vector table, and the other is to write the corresponding interrupt processing program.

The interrupt vector table is usually configured in the startup code. Generally, the vector table is placed at 0x00000000 of the memory address. Of course, some processor vector tables can also be located at the high address (0xffff0000 ). the interrupt vector table must be arranged strictly in the sequence from reset interruption to FIQ interruption. it may be clearer to describe using some code:

LDR     PC, Reset_AddressLDR     PC, Undefined_AddressLDR     PC, SWI_Address

The first is the reset interrupt, the second is the undefined interrupt, and the third is the Soft Interrupt. it can be seen that some jump commands are placed at the beginning of the interrupt vector table. Of course, ldr pc and [PC, # offset] are not required. you can also use the B command or mov PC, # immediate. it depends on how to use it. however, note that if mov is used, the immediate address must be an eight-bit immediate number loop and an even number shifted to the right. it is limited by address alignment.

Reset_Address           DCD     Reset_INT;Undefined_Address       DCD     Undefined_INTSWI_Address             DCD     Software_INT

 

The jump command should jump to the entrance of the interrupted service program. The above reset_int, undefined_int, and software_int are the endpoint address of the interrupted service program. Then define each interrupted service.

Undefined_INT   //。。。。

 

For unnecessary interruptions, a dummy function is generally declared, similar to the following form.

SWI_AddressB SWI_Address

Using a jump command to jump to itself is equivalent to an endless loop.

 

The following code is taken from the startup Code provided by Zhou ligong Development Board.

LDR     PC, ResetAddr;LDR     PC, UndefinedAddrLDR     PC, SWI_AddrLDR     PC, PrefetchAddrLDR     PC, DataAbortAddrDCD     0xb9205f80LDR     PC, [PC, #-0xff0]LDR     PC, FIQ_Addr

Ldr pc, [PC, #-0xff0] can be understood as follows:

The third-level assembly line structure of ARM7 leads the PC to point to the last eight bytes of the current command. IRQ should have been placed at 0x00000018. ldr pc, [PC, #-0xff0] After this statement is executed, the current Pc value is 0x00000018 + 8-0xff0. the result is 0xfffff030. take a look at the lpc22xx manual. this address is vicvectaddr. that is to say, this address should have been placed in the entry address of the IRQ service program, but this address is placed in the vicvectaddr register. there is a section in the English manual about vicvectaddr.
Description. It is easy to understand what is going on.

Vector address register. When an IRQ interrupt occurs, the IRQ service routine can read this register and jump to the value read.