Arm Working Mode

I. Memory Format (Word Alignment ):

The ARM architecture regards memory as a linear combination of bytes starting from zero addresses. Place the first stored word (32-bit) data from zero byte to three bytes, and place the second stored word data from the fourth byte to the seventh byte at a time. As a 32-bit microprocessor, the maximum addressing space supported by the ARM architecture is 4 GB.

 

Memory Format

1. Large-end format: the high byte is at the low address, and the low byte is at the high address;

2. Small-end format: the high-byte is in the high address, and the low-byte is in the low address;

Instruction length:

The instruction length of the ARM microprocessor is 32 bits, or 16 bits (in the thumb State ). ARM microprocessor supports three data types: byte (8 bits), half-character (16 bits), and word (32 bits). Among them, the word must be 4-byte aligned, the half word must be 2 bytes aligned.

Note: the so-called instruction length is the length of a complete instruction, rather than simply the length of the three letters mov

2. the cpu Of the arm system is in two working states:

1. Arm status: the processor executes 32-bit arm commands with the same words;

2. Thumb status: the processor executes a 16-bit half-aligned thumb command;

During the process of running the program, you can switch between the two States. The change of the processor's working status does not affect the working mode of the processor and the content in the corresponding register.

CPU power-on in arm State

 

III. The CPU of the arm system has the following seven working modes:

1. User Mode (usr): used for normal program execution;

2. Fast interrupt mode (FIQ): used for high-speed data transmission;

3. External Interrupt mode (IRQ): used for normal interrupt handling;

4. Management Mode (SVC): The protection mode used by the operating system;

5. Data Access termination mode (ABT): This mode is used to protect virtual storage and storage when data or command prefetch is terminated;

6. System Mode (sys): Run privileged operating system tasks;

7. undefined command stop mode (UND): This mode is used to support hardware when undefined commands are executed;

 

There are two ways to switch the working mode of arm:

Passive switch: When the arm is running, some exceptions or interruptions are generated to automatically switch the mode.

Active switch: The software changes, that is, the software sets registers to switch the arm mode. Therefore, the operating mode of the arm can be switched by assigning values to the corresponding registers.

TIPS: When the processor runs in user mode, some protected system resources cannot be accessed.

 

Except the user mode, all the other six work modes belong to the privileged mode;

The other five modes except the system mode are called the exception mode;

Most programs run in user mode;

The privileged mode is used to handle interruptions, exceptions, or access protected system resources;

Iv. Registers

Arm has 31 General 32-bit registers and 6 program status registers, which are divided into 7 groups. Some registers are shared by all working modes, some registers belong to each working mode;

R13 -- Stack pointer register, used to save the stack pointer;

R14-program connection register. When executing the BL subroutine call command, R14 gets the R15 backup, and R14 saves the R15 return value in case of interruption or exception;

R15 -- program counter;

Fast interrupt mode has 7 backup register R8-R14, which makes it possible to go into fast interrupt mode to execute a large part of the program without even having to save any register;

Other privileged modes contain two independent register copies R13 and R14, so that each mode can have its own stack pointer and connection register;

 

5. Current Program Status Register (CPSR)

CPSR has the following meanings:

T-bit: 1--cpu is in the thumb state, 0--cpu is in the arm State;

I, F (Interrupt prohibition bit): 1 -- disable interruption, 0 -- enable interruption;

Working Mode bits: You can change these bits to switch the mode;

6. program state storage register (spsr)

When switching to a privileged mode, the spsr saves the CPSR value of the previous working mode. In this way, the spsr value can be restored to the CPSR when the previous working mode is returned;

7. mode switching

When an exception occurs and the CPU enters the corresponding exception mode, the following tasks are automatically completed by the CPU:

1. Save the address of the next command to be executed in the previous Working Mode in R14 of the exception mode;

2. Copy the CPSR value to the spsr in exception mode;

3. Set the CPSR working mode to the working mode corresponding to the exception mode;

4. Make the Pc value equal to the address of this abnormal mode in the abnormal vector table, that is, jump to execute the corresponding instruction in the abnormal vector table;

When the abnormal work mode is returned to the previous work mode, the software should do the following:

1. Subtract an appropriate value (4 or 8) from R14 in exception mode and assign it to the PC register;

2. Assign the spsr value of the exception mode to CPSR;