"Microcomputer principle and Interface Technology (2nd edition)" Von Bochen wuning Editor-Tsinghua University Press--Take notes
One, 8088/8086 of 14 16-bit registers:
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1. General Register--8
(1) Data register--4
AX: accumulator, commonly used to hold operands in arithmetic logic operations, and all I/O directives use accumulators to transmit information to peripheral interfaces.
BX: base register, often used to hold the offset address when accessing memory.
CX: Count register, used as a counter in loop and string operations directives.
DX: A data register that stores the address of an I/O port in an I/O instruction that is indirectly addressed by a register.
In addition: When doing a two-word division operation, DX and AX are combined to hold a double-word number (32-bit), where DX storage is 16 bits high, and Ax holds 16 bits lower.
(2) Address pointer Register--2
SP: The stack pointer register, which holds the top offset address of the stack in the stacking operation, which points to the stack top.
BP: The base point pointer register, which is commonly used to store the offset address when accessing memory. But it is usually used with the SS register pair. (comparison: BX is usually used with DS register pairing.) )
As a general-purpose register, SP and BP can also hold data, but in practice, they are more often and more important to store the offset address of the memory unit, especially the SP, which acts as a pointer to the top of the stack when accessing it.
(3)--2 of the variable address register
SI: Source variable address register.
DI: The destination variable address register.
They are often used as index pointers in the address-addressing approach.
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2, Segment Register--4
CS: Code Snippet Register
SS: Stack segment Register
DS: Data Segment Register
ES: Additional segment Registers
Stores the subgrade address, which is the high 16 bits of the start address of the segment.
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3, control register--2 a
IP: Instruction Pointer register to hold the offset address of the prefetch instruction.
Flags: called the flag Register or the program status Word (PSW).
When the CPU takes the instruction, it always takes CS as the base and offsets the address in the IP segment. IP automatically adds 1 to the next byte of the instruction code when the CPU removes one byte of the instruction code from the memory unit in the CS segment that is offset to the IP address. The user cannot access the IP directly.
Flags is a 16-bit register, but only 9 bits are used, including 6 status flags and 3 control flags.
"From Baidu Encyclopedia"
II. conventions for the use of segment registers 8088/8086
table 2-3 8088/8086 conventions used for segment registers
Serial number |
Memory Access type |
Default segment Register |
Re-configurable segment registers |
Offset address source within paragraph |
1 |
Fetch instruction |
Cs |
No |
Ip |
2 |
Stack operations |
Ss |
No |
Sp |
3 |
String operation of the source string |
Ds |
ES, SS |
SI |
4 |
String operation of the target string |
Es |
No |
DI |
5 |
BP as base Address |
Ss |
ES, DS |
Valid address calculated by addressing method |
6 |
General data access |
Es |
ES, SS |
Valid address calculated by addressing method |
Assembly-8086 internal registers + conventions used for segment registers